Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-07-20
2003-12-23
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S370000
Reexamination Certificate
active
06667519
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to digital semiconductor technology. More specifically, the present invention relates to semiconductor device architectures for improving the throughput of electronic circuits.
2. Description of the Related Art
Digital microcircuits are used in a wide variety of applications. Digital microcircuits are the building blocks of which computers and numerous other sophisticated electronic devices. A fundamental characteristic of digital semiconductor technology is that on-chip processing power is increasing at a faster rate than total input/output (I/O) bandwidth. This is due to the fact that while on-chip feature size continues to decrease at a steady rate, a corresponding rate of reduction in the feature size of I/O connections is not currently possible. Consequently, digital processing capability is increasingly limited by chip I/O bottlenecks.
This is most evident in signal processing applications where there are fewer processing operations per I/O data sample than in general-purpose applications and in architectures that achieve the highest number of possible operations per transistor, e.g., custom-purpose chips and reconfigurable computer chips. Indeed, it is anticipated that ultimately, i.e., beyond the year 2010, I/O bottlenecks will affect all forms of digital processing performance.
The conventional approach to this problem has been to increase the signal connections into and out of the chip. However, this approach is fundamentally limited by physical constraints. This is due to the fact that the leads must be large, relative to the transistors on-chip, to connect with the components with which the chip interfaces.
A second conventional approach to the problem has been to increase the frequency at which the signals are communicated to and from the chip. However, this approach has been limited by the bandwidth of the technology. Inasmuch as complementary metal-oxide semiconductor (CMOS) technology is currently favored for the digital processing applications, it is the bandwidth of CMOS technology that limits the utility of this approach.
Thus, a need remains in the art for a system or method for increasing the bandwidth of a semiconductor chip without increasing the number of leads into and out of the chip.
SUMMARY OF THE INVENTION
The need in the art is addressed by the mixed technology microcircuit of the present invention. Generally, the inventive microcircuit includes a first circuit fabricated on a first layer with a first technology and a second circuit fabricated on a second layer with a second technology.
In the illustrative embodiment, the first circuit is fabricated with bipolar transistors in silicon germanium (SiGe) technology and the second circuit is fabricated with complementary metal-oxide semiconductor (CMOS) transistors in silicon technology. Electrical connection between the two layers is effected by conductive via structures. In an illustrative application, the first circuit includes a high-speed data receiver and a high-speed data transmitter. In the illustrative implementation, the data receiver includes a line receiver, a data and clock recovery circuit, and a demultiplexer and the data transmitter includes a multiplexer, a data and clock encoding circuit, and a line driver.
REFERENCES:
patent: 5790540 (1998-08-01), Buhrgard et al.
patent: 6057598 (2000-05-01), Payne et al.
patent: 6448622 (2002-09-01), Franke et al.
patent: 2001/0008284 (2001-07-01), Huang
patent: 2002/0072163 (2002-06-01), Wong et al.
Farwell William D.
Linder Lloyd F.
Meyers Clifford W.
Vahey Michael D.
Alkov Leonard A.
Cao Phat X.
Lenzen, Jr. Glenn H.
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