Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Reexamination Certificate
2000-09-25
2001-12-04
Fears, Terrell W. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including specified plural element logic arrangement
C365S230060
Reexamination Certificate
active
06327193
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and apparatus for generating video deflection signals for low cost display systems. In particular, the present invention relates to a method and apparatus that utilizes capacitive charge switching to generate vertical rate deflection signals in a low cost video display system.
BACKGROUND OF THE INVENTION
Typical video display systems use analog techniques to create a vertical deflection signal. In a cathode ray tube (CRT) display, the CRT has a phosphor screen located opposite an electron gun. The electron gun emits electrons, which are accelerated and focused on the phosphor screen by a high voltage grid. The phosphor has a luminance that will only last for a short time interval, and hence the screen must be periodically refreshed to retain an image. Conventional monitors typically refresh the phosphor screen at 60 Hz.
An image is displayed on a phosphor screen using a raster scan technique. The screen is divided up into a number of horizontal scan-lines. At the beginning of displaying a new image, the electron gun is positioned at the upper left corner of the screen at the first scan-line. For each scan-line, the electron beam is steered horizontally (left to right) across the screen at a fixed frequency. When the electron gun reached the right edge of the screen, the electron gun must return back to the left side of the screen (termed the horizontal retrace). During horizontal retrace, the electron beam is steered (right to left) to the left edge of the next scan-line immediately beneath the preceding scan-line. Once all scan-lines are traced by the electron gun, the beam is steered back to the top left corner of the screen during the vertical retrace interval. As described above, a CRT with a raster scan display screen requires the electron beam to be steered horizontally across the screen, and vertically across the screen for both the horizontal retrace interval and the vertical retrace interval. A horizontal deflection circuit is used to steer the beam horizontally, while a vertical deflection circuit steers the beam vertically. The horizontal and vertical deflection circuits produce high voltage signals. The high voltage signals are used to activate deflection coils, which steer the electron beam horizontally and vertically.
Typical vertical deflection circuits include a vertical oscillator circuit and vertical deflection coils. A composite video signal is coupled into the vertical deflection circuits. The composite video signal has horizontal and vertical sync pulses embedded in the signal. The vertical sync pulses in the composite signal are used to trigger the vertical oscillator so that the vertical oscillator locks to a frequency of 60 Hz. The vertical oscillator generates a 60 Hz saw tooth waveform. The saw tooth waveform is used to generate a current ramp to drive the vertical deflection coils. The current ramp drives the vertical deflection coils such that the electron beam moves from the top of the screen to the bottom of the screen at a uniform rate. At the end of the current ramp, the deflection coils are deactivated and the electron beam returns to the top of the screen.
Other circuits within a CRT display using vertical rate waveforms may use parabolic shape waveforms. Such circuits correct for parabolic errors that arise due to the geometry of the CRT, distortions in the deflection coils, and the variation in focus voltage between the center and the top and bottom of the screen. A parabolic waveform may be used to modulate the amplitude of the horizontal rate scan, in order that vertical lines portrayed on the screen appear as straight. Similarly, the focus voltage applied to the CRT focus electrode often needs to be modulated with a parabolic waveform in order to adjust the focal point of the electron beam as the beam scans from top through center to the bottom of the screen.
SUMMARY OF THE INVENTION
In accordance with the invention, the above and other problems are solved by an apparatus for generating deflection rate signals. Briefly stated, the present invention provides for a signal generator system that uses a combination of digital and analog techniques to generate vertical rate deflection signals for a display system. The vertical deflection signal is generated by a switched capacitor type accumulator circuit, a wave shape control circuit, and DC signal centering circuit. The signal is periodically reset by initializing the first storage circuit in the accumulator circuit to an initial start voltage. A buffer couples the first storage circuit to a first signal output. A second signal output is produced by generating a controlled offset from the first signal output.
The second signal output is sampled by a second storage circuit, and subsequently coupled to the first storage circuit. The amplitude of the signal and the slope of the signal are both determined based upon the controlled offset level. The wave shape control circuit dynamically controls the variations in the offset level. By varying the controlled offset level, the waveform shape may be adjusted to provide a linear ramp, an S corrected ramp, or an EWPCC parabolic signal or the like. A look up table, multiplier and/or a DAC may be used with a controlled source to provide the controlled offset level. The output waveform is centered about a midpoint DC level by the signal centering circuit. The signal centering circuit samples the first signal output at half of the period of the vertical retrace signal, and subtracts the first signal output from the sampled signal to maintain midpoint signal level for the signal. The present invention provides for an economical, efficient, and simple method for generating vertical rate deflection signals.
In accordance with an aspect of the invention, a first sampling circuit is employed to store a first signal. The first signal is coupled to a first output signal. An offset circuit is employed to produce a second output signal, the second output signal being the first output signal with an offset. The second output signal is selectively coupled to a second sampling circuit, the second sampling circuit storing a second signal. The second signal is selectively coupled to the first sampling circuit such that the first signal is periodically changed, and the first output signal results in a controlled ramp signal.
In accordance with a further aspect of the invention, the signal is periodically initialized to a start value by selectively coupling the first sampling circuit to an initial value.
In accordance with yet a further aspect of the invention, a midpoint signal centering circuit is employed to center the signal about a common signal level. A third sampling circuit is employed to selectively store a third signal. The third signal is proportional to the first output signal, and is sampled at a time when the first output signal is halfway through its period. A summing circuit subtracts the first signal from the third signal to produce an output waveform. The output waveform is centered about the midpoint signal level. Also, the output waveform center level may be further adjusted by a controlled source coupled to the summing circuit.
In accordance with an aspect of the invention, an apparatus for generating a signal that periodically resets is provided for. A first storage circuit stores a first signal thereon, the first signal being initialized to a start value at the start of a period. A second storage circuit stores a second signal thereon. A buffer circuit couples the first signal to a signal output. An offset circuit couples the signal output to another signal output such that the signal output is different than the signal output by an amount of offset. A control signal controls the amount of offset. A switch having a first and second position is employed to selectively couple the second storage circuit between two positions, the first position coupling the output signal to the second storage circuit, and the second position coupling the second signal to the first storage circuit. When t
Fears Terrell W.
Merchant & Gould P,C,
National Semiconductor Corporation
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