Electronic digital logic circuitry – Signal sensitivity or transmission integrity
Reexamination Certificate
2006-12-20
2009-11-24
Cho, James (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
C326S031000, C326S082000
Reexamination Certificate
active
07622945
ABSTRACT:
A method for a mix mode driver to accommodate traces of different lengths includes sequentially shifting values of a data signal to a number of stages and sequentially amplifying the values of the data signal at least one stage. Depending on the length of trace for the data signal, the method further includes providing at least one amplifying coefficient to at least one stage and coupling a subset of the stages to an adder. The method finally includes outputting the data signal from the adder to the trace.
REFERENCES:
patent: 6034544 (2000-03-01), Agrawal et al.
patent: 6794900 (2004-09-01), Tang et al.
patent: 2003/0016189 (2003-01-01), Abe et al.
Cheng Christopher
Chu David
3Par, Inc.
Cho James
Hsia David C.
Patent Law Group LLP
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