MIS-type field-effect transistor

Details MIS-type field-effect transistor MIS-type field-effect transistor

2004-12-28

2009-08-25

Pham, Thanh V (Department: 2894)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S190000, C257S285000, C257S349000, C257S616000, C257SE29246

Reexamination Certificate

active

07579636

ABSTRACT:
A strained Si layer2is epitaxially grown on a base SiGe layer1, and a gate insulating film3aand a gate electrode4aare formed. An impurity is then ion-implanted (FIG.2A) into the base SiGe layer1and the strained Si layer2using the gate electrode4aas a mask, heat treatment is performed for activation, and a source/drain region6is formed (FIGS.2B and2C). In this instance, the film thickness of the strained Si layer2is set to2Tp, where Tp(=Rp) is the depth having the maximum concentration of the impurity in the source/drain region6of the finished MISFET.

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