MIS transistor having an LDD structure

Details MIS transistor having an LDD structure MIS transistor having an LDD structure

2005-06-21

2005-06-21

Tran, Thien F (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S344000, C257S408000, C257S900000

Reexamination Certificate

active

06909144

ABSTRACT:
A gate electrode14is formed through a gate oxide film13over a channel region12in an element region11, and sidewall dielectric films16are provided on side sections of the gate electrode14. Source/drain regions17include low concentration impurity regions171and high concentration impurity regions172. The impurity regions172are provided, by an over-etching method when forming the sidewalls16, at a disposition level LV2in the element region11, which is lower than a disposition level LV1where the impurity regions171are disposed. Assisting impurity regions173are provided in regions where the levels change between level LV1and LV2. As a result, the continuity of impurity regions between the impurity regions172and the impurity regions171that are low concentration extension regions is secured, the their electrical connection is stabilized.

REFERENCES:
patent: 5534449 (1996-07-01), Dennison et al.
patent: 5757045 (1998-05-01), Tsai et al.
patent: 6137137 (2000-10-01), Wu

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