Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1995-11-21
1998-12-22
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438477, H01L 21027
Patent
active
058518614
ABSTRACT:
It is intended to provide a method of forming a gate overlap lightly doped impurity region (GOLD). After a gate insulating film is formed by a material mainly made of silicon oxide and a gate electrode is formed with, for instance, silicon, lightly doped impurity regions are formed. A coating mainly made of silicon is formed on the entire surface including the surface of the gate electrode. Side walls mainly made of silicon are formed on the side faces of the gate electrode by anisotropically or semi-anisotropically etching the thus-formed coating in an atmosphere of ClF.sub.3, for instance. In this etching step, since a selective etching ratio of the side walls to the gate insulating film is sufficiently large, etching of the gate insulating film is negligible. A source and a drain are then formed by doping an impurity at a high concentration using the gate electrode and the side walls as a mask.
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Suzawa Hideomi
Takemura Yasuhiko
Yamazaki Shunpei
Ferguson Jr. Gerald J.
Lebentritt Michael S.
Niebling John F.
Semiconductor Energy Laboratory Co,. Ltd.
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