MIS-FET with small chip area and high strength against static el

Details MIS-FET with small chip area and high strength against static el MIS-FET with small chip area and high strength against static el

1988-12-20

1992-11-03

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257367, H01L 2906

Patent

active

051609908

ABSTRACT:
A metal insulated semiconductor field effect transistor (MIS-FET) includes a substrate, a semiconductor layer, and an oxide film on the semiconductor layer. Source and drain regions are formed by doping the semiconductor layer with impurities. A gate electrode is formed on the oxide film between the source and drain regions. An electrode is provided on the opposite side of the drain region from the gate electrode without contacting the gate electrode. The electrode is connected to either the source region or the substrate. Thus, a high strength against static electricity is performed without using a large area on the chip.

REFERENCES:
patent: 3405329 (1968-10-01), Loro et al.
patent: 3463977 (1969-08-01), Grove et al.
patent: 4567502 (1986-01-01), Nakagawa et al.
patent: 4713681 (1987-12-01), Beasom

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