Mirrored tag snoop optimization

Details Mirrored tag snoop optimization Mirrored tag snoop optimization

2006-03-21

2006-03-21

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

C713S320000, C713S323000

Reexamination Certificate

active

07017054

ABSTRACT:
A method and system for reducing snoop traffic on a processor bus coupling a cache memory and a processor. The processor is unable to perform a snoop operation while operating in a lower power state to conserve power. A copy of cache tag is maintained in a memory controller coupled to the processor bus. The memory controller performs snoop operations on the copy of the cache tag while the processor is placed in the lower power state. The processor exits the lower power state when an access to a modified cached line occurs.

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