Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-05-03
2005-05-03
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S316000, C257S325000, C365S185180, C365S185250
Reexamination Certificate
active
06888192
ABSTRACT:
An arrangement of non-volatile memory transistors constructed in symmetric pairs within the space defined by intersecting pairs of word and bit lines of a memory array. The transistors have spaced apart sources and drains separated by a channel and having a floating gate over the channel characteristic of electrically erasable programmable read only memory transistors, except that there is no second poly gate. Only a single poly gate is used as a floating charge storage gate. This floating gate is placed sufficiently close to the source or drain of the device as to enable band-to-band tunneling. The floating gate is extended over the substrate to cross a word line where the floating gate is in a capacitive relation. The word line is used to program and erase the floating gate in combination with a source or drain electrode. A block erase mode is available so that the arrangement of transistors can operate as a flash memory. The single layer of poly has a T-shape, with the T-top used as the communication member with the word line and a T-base used as a floating gate. Both T-members are at the same potential. The intersecting pairs of word and bit lines resemble a tic-tac-toe pattern, with a central clear zone wherein pairs of symmetric non-volatile memory transistors are built.
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Atmel Corporation
Perkins Pamela E
Schneck Thomas
Schneck & Schneck
Zarabian Amir
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