Minimum size integrated circuit static memory cell

Details Minimum size integrated circuit static memory cell Minimum size integrated circuit static memory cell

1995-06-02

1997-12-30

Ngo, Ngan V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257401, 257903, 257904, H01L 2976, H01L 2994, H01L 31062, H01L 31113

Patent

active

057033927

ABSTRACT:
A semiconductor static memory cell with two cross-coupled inverters and two transmission gates for coupling two bit lines uses all minimum size (gate length and gate width) MOSFETs to achieve minimum area. This minimum dimension is rendered possible by using a higher threshold voltage for the transmission gate MOSFET than the threshold voltage of pull-down MOSFET of the inverter. Different threshold voltages are obtained with selective ion implantation, different gate oxide thicknesses and/or different gate doping.

REFERENCES:
patent: 4525811 (1985-07-01), Masuoka
patent: 4866002 (1989-09-01), Shizukuishi et al.
patent: 5285096 (1994-02-01), Ando et al.
patent: 5327002 (1994-07-01), Motoyoshi
patent: 5330929 (1994-07-01), Pfiester et al.
patent: 5373170 (1994-12-01), Pfiester et al.
patent: 5486717 (1996-01-01), Kokubo et al.

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