Minimizing resist poisoning in the manufacture of...

Details Minimizing resist poisoning in the manufacture of... Minimizing resist poisoning in the manufacture of...

2007-07-25

2008-09-16

Ghyka, Alexander G (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S637000, C438S672000, C438S675000, C257SE21579

Reexamination Certificate

active

07425502

ABSTRACT:
The present invention provides a method for manufacturing an interconnect and a method for manufacturing an integrated circuit including the interconnect. The method of manufacturing an interconnect, among other steps, includes forming a via (160) in a substrate (130) and then forming a base getter material (210) in the via (160). The method further includes forming a photoresist layer (410) over the base getter material (210), the photoresist layer (410) having an opening (420) therein positioned over the via (160), and etching a trench (510) into the substrate (130) using the opening (420) in the photoresist layer (410).

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patent: 6488509 (2002-12-01), Ho et al.
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patent: 6586339 (2003-07-01), Plat et al.
patent: 6605536 (2003-08-01), Eissa et al.
patent: 2005/0085086 (2005-04-01), Kanzawa

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