Minimizing power consumption in pipelined circuit by...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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C713S323000, C713S330000, C326S035000

Reexamination Certificate

active

06907534

ABSTRACT:
Power consumption in a circuit is minimized. The circuit includes a pipelined circuit having a plurality of stages. A determination is made as to whether a predetermined period of time has expired. The predetermined period of time being associated with a predetermined period of time to detect a transition of an input or an output of the pipelined circuit. If the predetermined period of time is exceeded, a sequential shut-down procedure is performed on each stage in the plurality of stages of the pipelined circuit so that each stage is shut-down.

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patent: 401102644 (1989-04-01), None

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