Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
2002-05-01
2004-07-13
Nelms, David (Department: 2818)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
C365S171000, C365S200000, C365S201000, C365S209000, C365S230070, C365S232000, C365S243500
Reexamination Certificate
active
06762952
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to magnetoresistive solid-state storage devices, and, more particularly, to minimizing errors in a magnetoresistive solid-state storage device.
2. Related Art
A typical magnetoresistive solid-state storage device, such as a magnetic random access memory (MRAM) device, includes an array of storage cells. Each of the cells is typically constructed of two layers of magnetic film, separated by a dielectric layer. The orientation of the magnetization of one of the layers is alterable, while the orientation of the magnetization of the other layer is fixed or “pinned” in a particular orientation. The magnetic film layer having alterable magnetization is typically referred to as a “data storage layer” and the magnetic film layer which is pinned is typically referred to as a “reference layer.”
Conductive traces are typically routed across the array of storage cells. These conductive traces are typically arranged in rows and columns. The conductive traces extending along the rows of the storage cells are generally referred to as “word lines” and the conductive traces extending along the columns of the storage cells are generally referred to as “bit lines.” The word lines and bit lines are typically oriented perpendicular to each other. Located at each intersection of a word line and a bit line, each storage cell stores a bit of information as an orientation of magnetization.
Typically, the orientation of magnetization in the data storage layer aligns along an axis of the data storage layer that is commonly referred to as its easy axis. Typically, external magnetic fields are applied to flip the orientation of magnetization in the data storage layer along its easy axis to either a parallel or anti-parallel orientation with respect to the orientation of magnetization in the reference layer, depending on the desired logic state.
The orientation of magnetization of each storage cell will assume one of two stable orientations at any given time. Typically, these two stable orientations, parallel and anti-parallel, represent the logic values of “1” and “0,” respectively. Alternatively, a system can be configured to interpret the anti-parallel state as a logic “1” and the parallel state as a logic “0.” The orientation of magnetization of a selected storage cell may be changed (i.e., from parallel to anti-parallel, or vice versa) by supplying current to a word line and a bit line crossing at the location of the selected storage cell. The currents create magnetic fields that, when combined, can switch the orientation of magnetization of the selected storage cell from parallel to anti-parallel or vice versa.
Ideally, the magnetic fields in each cell of an MRAM array will align in either the parallel or anti-parallel directions. Unfortunately, however, due to imperfections in the magnetic materials used to form MRAM arrays, each cell in the MRAM array may not be a perfect rectangle. Therefore, the magnetic fields in some of the storage cells may be misaligned with respect to each other. The magnetic fields in such a cell will typically demonstrate a preference for aligning in either the anti-parallel orientation or the parallel orientation, which may result in an error when an attempt is made to write data to the cell. In some circumstances, the magnetic fields in a particular cell may even become stuck in either the anti-parallel orientation or the parallel orientation. A cell having a propensity to favor one orientation over the other typically does not switch its orientation reliably when written to, thus introducing an error into the data. For example, assume that it is desired to store the binary number 0000 in an MRAM array. However, when each bit of the binary number 0000 is written to a cell in the array, one of the bits is written to a cell that has a propensity to remain in the orientation of magnetization that corresponds to a logic “1.” Therefore, when the number is read from the array, a “1” rather than a “0” will be read from the cell having a propensity to remain in the orientation that corresponds to a “1” (e.g., the number read from the array could be 0010 instead of 0000), thus introducing an error into the system.
Therefore, there is a need for overcoming the deficiencies and inadequacies stated above.
SUMMARY
The present disclosure provides exemplar embodiments which allow errors in a magnetoresistive solid-state storage device having a plurality of cells, such as a magnetic go random access memory (MRAM) device array, to be minimized. An illustrative method may be characterized as comprising the steps of identifying cells in a magnetoresistive solid-state storage device which have a failure mode characterized by a propensity to remain in a particular orientation of magnetization, mapping the location of the identified cells, and compensating for the failure mode of a cell at a mapped location.
An illustrative system comprises a testing element configured to identify cells in a magnetoresistive solid-state storage device which have a failure mode characterized by a propensity to remain in a particular orientation of magnetization, a memory element, and a processing element configured to map the location of the identified cells into the memory element and to compensate for the failure mode of a mapped cell.
Other features and advantages of the present invention will become apparent to one with skill in the art upon examination of the following drawings and detailed description. It is intended that all such features and advantages be included herein within the scope of the present invention, as defined in the appended claims.
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Brandenberger Sarah M.
Munden Terrel R.
Hewlett--Packard Development Company, L.P.
Nelms David
Pham Ly Duy
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