Microwave annealing

Details Microwave annealing Microwave annealing

2000-01-27

2001-11-13

Jones, Deborah (Department: 1775)

Stock material or miscellaneous articles

All metal or with adjacent metals

Composite; i.e., plural, adjacent, spatially distinct metal...

C428S615000, C428S620000, C148S240000, C148S648000

Reexamination Certificate

active

06316123

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method of forming at least one new material layer or region within a structure which contains at least two dissimilar materials. More specifically, the method of the present invention relates to microwave heating a structure under conditions effective to form a new material layer or region within a structure, wherein said structure comprises at least two dissimilar materials having an interface region existing therebetween and, an optional third layer, wherein at least one of said dissimilar materials or optional third layer is capable of being heated by microwave radiation. The method of the present invention can be used in a wide variety of applications including, but not limited to: manufacturing of complementary-metal oxide (CMOS) semiconductor devices, tool bits and other structures wherein two dissimilar materials are employed.
BACKGROUND OF THE INVENTION
A key to continued CMOS miniaturization is the ability to scale down the horizontal and vertical dimensions of the semiconductor device while increasing speed, decreasing power, and operating at lower voltages. As devices are scaled below 0.25 &mgr;m, the sheet resistance and contact resistance of the transistor contacts must be maintained at low values. A further requirement is that the source-to-substrate leakage be maintained low in order to ensure device and circuit performance without error. These requirements put stringent boundary conditions on the nature and dimension of the gate and source/drain contacts, which are typically composed of metal suicides in microprocessors, ASICS and DRAM devices. In order to obtain low sheet resistance, the silicides must have resistivities below 100 &mgr;Ohm-cm and a thickness greater than 200Å.
For self-aligned silicide processes, used ubiquitously for microprocessors and widely in DRAM technology, the silicide thickness must be minimized to avoid excessive consumption of silicon in the source/drain region. Excessive silicon consumption leads to silicide penetration of the junction and high leakage currents. This becomes more critical as the junction depth shrinks with devices having a channel length below 0.25 &mgr;m. in addition, in order to maintain abrupt and shallow p-
-junctions in scaled CMOS devices, the thermal annealing, which follows junction formation, must be reduced to minimize dopant motion in the junction.
In order to meet the above conflicting requirements, source/drain silicide materials having a balance of low resistivity and moderate silicon consumption are being used. Such material include Ti silicides, Co suicides and Ni silicides. Additionally, the trend in silicide formation, as with junction formation, is toward utilizing annealing processes which have shorter times and high temperatures and that use lamp-based thermal annealing wherein the silicide formation is accomplished in 10-60 seconds. This minimizes side reactions, such as oxidation, inversion of silicide where polysilicon may move to the top surface of the silicide, and breaking up silicide film into islands or agglomerates, that are generally associated with increased sheet resistance and junction leakage. However, even rapid thermal annealing (RTA) can lead to agglomeration and increased resistance. This restricts the thermal process window for the reaction of the metal films to form low resistance contacts before the films become unstable. The tendency to agglomerate also increases as the transistor line width shrinks, further narrowing the process window for low resistance and low leakage contacts.
Evolution of silicide processing began in the late 1970's when silicides were introduced into wide spread use in large-scaled integrated (LSI) devices. Silicide formation was obtained by annealing at high temperatures for minutes or, in some cases, for hours in a furnace containing a flowing gas. More recently, RTA processes have been employed. In RTA only the silicon wafer is substantially heated and for periods not exceeding 1-2 minutes. The wafer is rapidly ramped up to a hold temperature (typically greater than 30° C./sec) and, thereafter, rapidly cooled.
There are several examples in the prior art of silicide formation on silicon wafers utilizing very rapid thermal annealing (<1sec). These examples include the use of laser annealing and electron beam annealing. The laser beam examples are further subdivided between excimer, Q-switched YAG, and Continuous Wave (CW) annealing. One of the earliest reports from Poate, et al., “Laser-induced reactions of platinum and other metal films with silicon”, Appl. Phys. Lett. 33, (1978) p. 918, indicated formation of silicide in the 100 ns time scale by heating with a Nd-YAG laser and causing the metal/silicon mixture to melt and recrystallize into silicides under beam diameters of about 10 microns. Other studies involving excimer annealing using 30 ns pulse also melted the silicon substrate to form the silicide.
Numerous studies using CW annealing in the 100 microsecond time regime have shown silicide formation by solid state diffusion. Some examples of such studies include: T. Shibata, et al. “Metal Silicon Reactions Induced by CW Scanned Laser and Electron Beams”, Electrochem. Soc.: SOLID-STATE SCIENCE AND
TECHNOLOGY, 128, No. 3 (1981) p. 637; G. Bomchili, et al., “Formation Kinetics of MoSi
2
induced by CW Scanned Laser Beam”, Appl. Phys. Lett., 41 (1982), p. 46; and I. Ursu, et al., “Titanium Silicide Synthesis as an effect of CW CO
2
Laser Irradiation”, J. Appl. Phy., 66 (1989), p. 5635. Silicide formation using electron beam irradiation has also been reported by T. Shibita, et al., ibid.
All of the above annealing techniques employ small diameter beams ranging from tens of microns (CW laser) to a millimeter (excimer laser). Annealing over macroscopically large areas require beam rastering.
Despite the current state of the art, there is a continued need to develop new and improved silicide processes which do not have any of the problems mentioned with the prior art processes.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a method of forming a new material layer or region within a structure having at least two dissimilar materials. This new material layer or region is composed of components from the two dissimilar materials and is formed by irradiating the structure with microwave energy.
Another object of the present invention is to provide a method of producing a solid state layer or region within a structure that does not exhibit any side reactions such as film agglomeration or inversion.
These as well as other objects are achieved by the present invention by using microwave heating in a manner such that the power, time and pulsing of the microwave process is controlled so as to form a new material layer or region at or near the interface region of two dissimilar materials, wherein one of said dissimilar materials is capable of being heated by radiation in the microwave range. The method of the present invention thus comprises the steps of:
(a) providing a structure having at least two dissimilar materials intimately in contact with each other so that an interface region exists therebetween, and an optional third layer, wherein at least one of said dissimilar materials or said optional third layer is capable of being heated by microwave radiation; and
(b) irradiating the structure with microwave energy under conditions effective to form a new material layer or region in proximity to said interface region of said structure.
Broadly speaking then the method of the present invention comprises a procedure wherein two dissimilar layers of a structure are altered to produce one or more new material layers or regions near the original interface of the two dissimilar materials. This may apply to the reaction of WC on steel to form an adhesive layer between the hard coating (WC) and the substrate (steel) such as is desired in tool bit coating technology.
In addition, the method of the present invention may find applications in a structure containing mul

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