Microstructure producing method capable of controlling...

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C438S962000, C257S009000, C257S014000, C257S017000, C257S021000, C257S023000, C257S086000, C257S088000, C257S315000

Reexamination Certificate

active

06326311

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a microstructure producing method for forming a minute particle or thin line constructed of a metal or semiconductor, which is minute enough to produce a quantum size effect on an insulative substrate and to a semiconductor device employing a microstructure used as a single-electron device or a quantum-effect device.
Large-scale integrated circuits (LSIs), which have supported the progress of electronics that currently serves as a key industry, have remarkably improved the performances of large capacity, high speed and low power consumption by microstructural development. However, if the device size becomes equal to or smaller than 0.1 &mgr;m, then the device presumably encounters a limit on the conventional principle of operation, and this has stimulated energetic researches on a new device based on a new principle of operation. As this new device, there is a device having a microstructure called the quantum dot or quantum thin line of a nanometer size. The quantum dot of the nanometer size has been subjected to energetic researches for application to a single-electron device that employs, in particular, the coulomb blockade phenomenon, together with a variety of quantum-effect devices. The quantum thin line of the nanometer size is expected to be applied to a super-high-speed transistor utilizing the quantum effect.
As a new trend of future electronics, there is a grope for the fusion of an electronic circuit and an optical communication circuit. In such a case, it is indispensable to mount a photoelectric transducer on an LSI substrate, and accordingly, there is necessitated a light-receiving and light-emitting device employing an Si-based material that is the mainstream of LSIs. The light-receiving device has conventionally been put into practical use with the Si-based material. However, with regard to light emission, it has been the accepted view that light emission is not effected since the Si-based IV-group semiconductors have an indirect transition type bandgap. However, it has lately been confirmed that light emission is effected by a minute crystal grain having a size of not greater than 10 nm due to the existence of a direct transition type band structure, and this has stimulated energetic researches.
Aside from the aforementioned example, there have been conducted a variety of researches on the formation techniques of the quantum dot or quantum thin line, intended for application to a variety of electronic and optical devices utilizing the features of the quantum effect and so on. The formation techniques of the quantum dot or quantum thin line disclosed in the following reference documents of (1) through (5) will be described below.
(1) Reference document of Japanese Patent Laid-Open Publication No. HEI 8-64525
FIG. 20
is a sectional view showing the construction of the “Quantum dot producing method and single-electron transistor employing the quantum dot” disclosed in the above reference document of Japanese Patent Laid-Open Publication No. HEI 8-64525. The above single-electron transistor is fabricated by forming an insulating film
72
on a silicon substrate
71
, thereafter depositing a conductive film on the insulating film
72
and patterning the conductive film for the formation of a source region
74
and a drain region
75
. Next, Si minute particles are deposited to a size of 20 Å at intervals of 20 Å in a high vacuum environment at a temperature of 125° C. by the electron beam evaporation method and then thermally treated at a temperature of 500° C. In this stage, in order to stably grow the Si minute particles with good controllability, the deposition temperature of the silicon substrate
71
is lowered close to the lower limit temperature (about 240° C.) of the Si deposition, thereby depositing amorphous Si minute particles. Thereafter, the Si minute particles are crystallized by heat treatment at a temperature of not lower than the crystallizing temperature (240° C.), thereby forming crystalline Si minute particles
73
. Next, a gate insulating film
76
is deposited to a thickness of 40 Å on the insulating film
72
, crystalline Si minute particles
73
, source region
74
and drain region
75
, and a gate electrode
78
is formed on the region of the gate insulating film
76
corresponding to a region between the source region
74
and the drain region
75
. This single-electron transistor is used by applying a voltage across the source region
74
and the drain region
75
for the formation of a current between the source region
74
and the drain region
75
via the crystalline Si minute particles
73
and controlling the current by a voltage applied to the gate electrode
78
. When no voltage is applied to the gate electrode
78
, no current flows due to the coulomb blockade phenomenon produced by the quantum size effect in the crystalline Si minute particles
73
. However, if a tunnel resistance between the crystalline Si minute particles
73
is made not greater than the quantum resistance by applying a voltage to the gate electrode
78
, then a current flows as a consequence of the breakdown of the coulomb blockade phenomenon.
FIG. 21
is a sectional view showing the construction of the “Light-emitting device employing quantum dot” disclosed in the reference document of Japanese Patent Laid-Open Publication No. HEI 8-64525. As shown in
FIG. 21
, the light-emitting device is fabricated by forming an insulating film
82
of a thin film (30 Å) on a silicon substrate
81
, forming crystalline Si minute particles
83
on the insulating film
82
by a method similar to the single-electron transistor fabricating method, thereafter depositing an insulating film
84
of a thin film (30 Å) on the film and particles and further forming a transparent electrode
85
on the insulating film
84
. This light-emitting device emits light by injecting a carrier into the crystalline Si minute particles
83
with a tunnel current formed by applying a voltage across the transparent electrode
85
that serves as an upper electrode and the silicon substrate
81
that serves as a lower electrode.
(2) Ishiguro, et al., Japan Society of Applied Physics lectures in the spring of 1996, lecture No. 28a-PB-5, Proceeding p-798 and lecture No. 26P-ZA-12, Proceeding p-64
FIGS. 22A through 22D
are process charts showing the “Method for producing uniform Si quantum thin line on SIMOX substrate utilizing anisotropic etching” disclosed in the above reference document of the item (2).
First, as shown in
FIG. 22A
, silicon nitride (Si
3
N
4
) is deposited on a (100) SIMOX substrate constructed of a silicon substrate
91
, an oxide film
92
and an SOI (Silicon On Insulator) film
93
, and thereafter patterning is performed to form a silicon nitride film
94
.
Next, as shown in
FIG. 22B
, anisotropic etching is performed using TMAH (Tetra Methyl Ammonium-Hydroxide) with the silicon nitride film
94
used as a mask, thereby forming an SOI film
93
a
having a (111) plane on the pattern edge.
Next, as shown in
FIG. 22C
, the (111) plane of the sidewall of the SOI film
93
a
is selectively oxidized with the silicon nitride film
94
used as a mask, thereby forming an oxide film
95
.
Then, as shown in
FIG. 22D
, the silicon nitride film
94
is removed, and thereafter the anisotropic etching is performed again by TMAH with the oxide film
95
used as a mask, thereby forming an Si quantum thin line
96
having a width of 10 nm and a length of 100 nm. The width of the Si quantum thin line
96
depends on the film thickness of the SOI film
93
.
In a quantum thin line MOSFET where the Si quantum thin line
96
is formed as a channel region similar to the single-electron device shown in
FIG. 21
, coulomb blockade vibration, or the feature of the single-electron phenomenon is observed at room temperature (see FIG.
23
).
FIG. 23
shows the gate dependency of the drain current of the single-electron device employing the Si quantum thin line, where the horizontal axis represents the gate volt

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