Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Reexamination Certificate
1999-06-30
2002-11-05
Heckler, Thomas M. (Department: 2185)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Multiple or variable intervals or frequencies
Reexamination Certificate
active
06477658
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a microprocessor and, more particularly, to a microprocessor with a variable clock operation that is operative at both a highest speed as well as a lowest speed, within a performance range of the microprocessor.
2. Background of the Related Art
Though microcomputers are different from each other in view of the systems they support, all of them have a microprocessor. As the microprocessor determines the capabilities of the microcomputer, the microprocessor is perhaps the most critical component of the microcomputer. The operational speed of the microprocessor determines a maximum speed of the microcomputer, and its address and data pins determine a memory size and a word size of the microcomputer. The microprocessor's control pins determine the form of input/output (I/O) interfacing to be used. The aforementioned microprocessor has the following variety of functions. That is, the microprocessor provides timing and control signals to all parts of the microcomputer, fetches instructions and data from memories, transmits data to/from I/Os, interprets instructions, performs the calculations and logical operations required by the instructions, and responds to control signals generated from I/O signals, such as a reset or interrupt. A related art microprocessor will be explained with reference to the attached drawings.
FIG. 1
illustrates a related art microprocessor, schematically. The related art microprocessor
10
derives its operational speed from an external and constant main clock. For example, when an external clock of 100 MHz is applied to microprocessor
10
, to determine the operational condition of the microprocessor, the microprocessor is given a passing grade if it functions properly and a failing grade if it doesn't, thereby determining an operational speed of the microprocessor. That is, if microprocessor
10
functions properly when a given main clock is applied to it, the frequency of the clock indicates a proper operational speed of microprocessor
10
. However, the maximum operational speed of microprocessor
10
speed is not identified by this test.
Therefore, the related art microprocessor has the following problems.
That is, the operational speed of a microprocessor is fixed by a constant main clock, and the maximum operational speed of the microprocessor may not be achieved unless the main clock happens to operate at the maximum frequency for the particular microprocessor.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a microprocessor with a variable clock operation that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a microprocessor with a variable clock operation that facilitates use of a maximum operational speed and a lowest operational speed within the operational range.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the microprocessor with a variable clock operation includes a microprocessor having a critical path operation (CPO) block that is adapted to be operative at a speed corresponding to an external clock signal; a decision circuit for deciding an operation state of the microprocessor according to a test result of the CPO block in the microprocessor; a MUX unit for selecting a signal from the decision circuit or an external signal, selecting a signal intended to control, and forwarding the selected signal; a controlling unit for receiving a signal from the MUX unit for providing a control signal for varying a clock signal; and a PLL circuit for varying the clock signal in response to the control signal from the controlling unit, for applying a varied clock signal to the microprocessor.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5412349 (1995-05-01), Young et al.
patent: 5548679 (1996-08-01), Kiyota
patent: 5991888 (1999-11-01), Faulkner et al.
patent: 6127858 (2000-10-01), Stinson et al.
Fleshner & Kim LLP
Heckler Thomas M.
Hyundai Electronics Industries Co,. Ltd.
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