Microprocessor with reduced power consumption in accordance with

Details Microprocessor with reduced power consumption in accordance with Microprocessor with reduced power consumption in accordance with

1997-10-09

2000-03-07

Butler, Dennis M.

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

Multiple or variable intervals or frequencies

713601, G06F 108

Patent

active

060354100

ABSTRACT:
A microprocessor that includes a processor (6) for executing an instruction in accordance with an internal clock signal, an instructing section (3) for outputting a frequency multiplication rate instructing signal corresponding to the data output from the processor, and a data selecting section (2) for selectively outputting the frequency multiplication rate instructing signal. A PLL section changes the frequency of the internal clock signal in response to the frequency multiplication rate instructing signal output from the data selecting section. Inhibiting section inhibits the internal clock signal from being supplied from a PLL section to the processor for a predetermined period until the frequency of the internal clock signal in the PLL section becomes stable.

REFERENCES:
patent: 4893271 (1990-01-01), Davis et al.
patent: 5774701 (1998-06-01), Matsui et al.
patent: 5778237 (1998-07-01), Yamamoto et al.

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