Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2008-08-04
2010-10-26
Song, Jasmine (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S137000, C711S205000, C711S206000, C711S213000, C711SE12057, C712S207000, C712S237000
Reexamination Certificate
active
07822943
ABSTRACT:
Systems, methods and computer program products for improving data stream prefetching in a microprocessor are described herein. The method includes the steps of: 1) translating an address associated with a first type of memory access request in a first translation look-aside buffer (TLB) to provide an address translation associated with only a first type of memory access request; 2) translating an address associated with a second type or memory access request in a second translation look-aside buffer a second TLB to provide an address translation associated with only a second type of memory access request, wherein the first and second types are different; 3) receiving first status information from the first TLB; 4) receiving second status information from the second TLB; 5) providing a control signal to a selector based on the received first and second status information, the control signal indicating whether to use the address translation from the first TLB or the second TLB; and 6) selecting whether to use the address translation from the first TLB or second TLB in according with the control signal.
REFERENCES:
patent: 5375216 (1994-12-01), Moyer et al.
patent: 5732242 (1998-03-01), Mowry
patent: 5835967 (1998-11-01), McMahan
patent: 5948095 (1999-09-01), Arora et al.
patent: 6119222 (2000-09-01), Shiell et al.
patent: 6128703 (2000-10-01), Bourekas et al.
patent: 6202130 (2001-03-01), Scales et al.
patent: 6212603 (2001-04-01), McInerney et al.
patent: 6240488 (2001-05-01), Mowry
patent: 6401192 (2002-06-01), Schroter et al.
patent: 6434649 (2002-08-01), Baker et al.
patent: 6490658 (2002-12-01), Ahmed et al.
patent: 6578130 (2003-06-01), Barrick et al.
patent: 6775765 (2004-08-01), Lee et al.
patent: 6785772 (2004-08-01), Venkumahanti et al.
patent: 6832280 (2004-12-01), Malik et al.
patent: 6854048 (2005-02-01), Dice
patent: 6981099 (2005-12-01), Paulraj et al.
patent: 6985999 (2006-01-01), Henry et al.
patent: 7177985 (2007-02-01), Diefendorff
patent: 7194582 (2007-03-01), Diefendorff et al.
patent: 2002/0087802 (2002-07-01), Al-Dajani et al.
patent: 2003/0018875 (2003-01-01), Henry et al.
patent: 2004/0186960 (2004-09-01), Poggio
patent: 2007/0043907 (2007-02-01), Diefendorff
patent: 2007/0043908 (2007-02-01), Diefendorff
patent: 2007/0043909 (2007-02-01), Diefendorff
patent: 2007/0055824 (2007-03-01), Diefendorff et al.
patent: 2007/0101104 (2007-05-01), Diefendorff
patent: 2007/0101105 (2007-05-01), Diefendorff
Office Communication, dated Feb. 21, 2008, for U.S. Appl. No. 11/463,950, filed Aug. 11, 2006, 12 pages.
Office Communication, dated Aug. 21, 2008, for U.S. Appl. No. 11/463,950, filed Aug. 11, 2006, 11 pages.
Office Communication, dated Apr. 14, 2009, for U.S. Appl. No. 11/463,950, filed Aug. 11, 2006, 13 pages.
Office Communication, dated Feb. 22, 2008, for U.S. Appl. No. 11/463,954, filed Aug. 11, 2006, 16 pages.
Office Communication, dated Sep. 6, 2007, for U.S. Appl. No. 11/463,957, filed Aug. 11, 2006, 9 pages.
Office Communication, dated Feb. 8, 2008, for U.S. Appl. No. 11/549,413, filed Oct. 13, 2006, 11 pages.
Office Communication, dated Jan. 28, 2008, for U.S. Appl. No. 11/549,418, filed Oct. 13, 2006, 13 pages.
VanderWiel, Steven, David J. Lilja,A Survey of Data Prefetching Techniques, Technical Report No. HPPC-96-05. University of Minnesota.
McKee, Sally A. et al., “Smarter Memory: Improving Bandwidth For Streamed References,”ComputerIEEE 1998.
VanderWiel, Steven P., David J. Lilja, “When Caches Aren't Enough: Data Prefetching Techniques.”ComputerIEEE 1997.
“Instruction Set Reference,”IA-32 Intel Architecture Software Developer's Manual. vol. 2. 2001. pp. 3-600 through 3-601.
Diefendorff, Keith, Michael Allen. “Organization of the Motorola 88110 Superscalar Risc Microprocessor.”IEEE Micro1992.
Diefendorff, Keith, Rich Oehler, Ron Hochsprung. “Evolution of the PowerPC Architecture.”IEEE Micro1994.
Ball, Stuart, Robert Probin. “An Overview of Altivec on the PowerPC.” 1998 Lightsoft.
Altivec Technology Programming Environments Manual. Digital DNA from Motorola. Feb. 2002.
Altivec. “The Caches: Memory and Alignment.” Jun. 3, 2003.
Diefendorff, Keith et al. “Altivec Extension to PowerPC Accelerates Media Processing.”IEEE Micro2000.
Ollmann, Ian. “Altivec (a.k.a. Velocity Engine).” Altivec Tutorial. 2001.
MIPS Technologies Inc.
Song Jasmine
Sterne Kessler Goldstein & Fox P.L.L.C.
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