Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1995-12-18
1998-09-15
Gossage, Glenn
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711128, 711135, 711209, 395569, 395678, G06F 1200, G06F 1300
Patent
active
058095225
ABSTRACT:
An x86 microprocessor system with a process identification system which stores a number assigned to each process run by the microprocessor system and associates this number with instructions, data, and information fetched and stored in a cache or translation lookaside buffer (TLB) during the execution of the process. Upon a process or context switch, the instructions, data, and information are not automatically flushed from the cache and TLB. The instructions, data, and information are replaced only when instructions, data, and information for a new process require the same cache memory locations or the same TLB memory location. The cache and TLB may include a valid bit block and a tag block that includes memory locations for storing the pertinent process identification number for each entry. The cache, which may be a set associative cache, and TLB include logic for comparing a process identification number stored in a process identification register with the process identification number stored in the tag block.
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Chen Hong-Yi
Novak Steve
Advanced Micro Devices , Inc.
Gossage Glenn
Nelson H. Donald
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