Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-04-19
2005-04-19
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S023000, C714S041000, C714S051000
Reexamination Certificate
active
06883123
ABSTRACT:
A microprocessor runaway monitoring control circuit with which self-diagnosis of a watchdog timer WDT can be carried out safely and cheaply even during operation of the microprocessor (CPU). A microprocessor101supplies first and second watchdog clearing signals WD1and WD2to first and second watchdog timers WDT1and WDT2, and when the both of the watchdog clearing signals WD1and WD2stop, the microprocessor101is reset by way of a logical connector circuit122. The microprocessor101has failure diagnosing means103which intentionally stops the first watchdog clearing signal WD1and diagnoses the response of the first watchdog timer WDT1on the basis of a monitor signal MN1and stops the second watchdog clearing signal WD2and diagnoses the response of the second watchdog timer WDT2on the basis of a monitor signal MN2, whereby diagnosis of the watchdog timers WDT1, WDT2is carried out without the microprocessor101being stopped.
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Fujita Masahide
Hashimoto Kohji
Mitsueda Hiroyuki
Nakamoto Katsuya
Beausoliel Robert
Puente Emerson
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