Microprocessor program addressing arrangement having...

Electrical computers and digital processing systems: memory – Address formation – Address multiplexing or address bus manipulation

Reexamination Certificate

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C711S214000, C711S219000

Reexamination Certificate

active

07577818

ABSTRACT:
An address-generating arrangement for a microprocessor has, in addition to its base address-generating unit, one or more address-generating expansion units, connected to the basic unity by an interface. The interface comprises one or more input data buses supplying data from the base unit to the expansion unit and an output data bus supplying data from the expansion unit to the basic unit under control of the microprocessor.

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patent: 4009382 (1991-09-01), None

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