Microprocessor memory test circuit and method

Details Microprocessor memory test circuit and method Microprocessor memory test circuit and method

1995-12-27

1998-01-27

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Testing

371 226, 39518306, G11C 700, G01R 3128

Patent

active

057128227

ABSTRACT:
A circuit and method for testing on-chip memory for a microprocessor or a microcomputer is disclosed. The memory test circuit includes an input register, an output register, an adder, and a sequencer to control the test process. The process includes receiving a simple communication protocol from the control unit to start the test, running a common memory test such as a checker board, AAAAh, 5555h and the like, and then storing the test results in an output register. The test circuit can include a bi-directional RESET signal means for disabling the system while the microprocessor or microcomputer runs its memory test.

REFERENCES:
patent: 4955024 (1990-09-01), Pleiffer et al.
patent: 4967387 (1990-10-01), Shibasaki et al.
Barry B. Brey, The Intel 32-Bit Microprocessors: 80386, 80486, and Pentium, 1995, pp. 363-378.
Betty Prince, Semiconductor Memories: A Handbook of Design, Manufacture, and Application, 2d ed., 1991, pp. 697-716.
Micromate User's Guide, Micron Technology, 1995, pp. 3-1 to 3-25.
A.J. Van de Goor, Testing Semiconductor Memories: Theory and Practice, 1991, pp. 65-88, 237-257, 259-267, 269-284, 425-436, 473-476, 489-501.
Rodnay Zaks and Alexander Wolfe. From Chips to Systems: An Introduction to Microcomputers. 2nd Edition. Sybex, Inc., 1981, pp. 116-159.
ST486DX/DX2 Databook, 1st Edition, Jul. 1994, pp. 4, 13-16, 19, 51-53, 87-90.

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