Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate
2011-01-18
2011-01-18
Ellis, Kevin L (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Combining two or more values to create address
C712S205000
Reexamination Certificate
active
07873810
ABSTRACT:
A modular subtraction instruction for execution on a microprocessor having at least one register. The instruction includes opcode bits for designating the instruction and operand bits for designating at least one register storing an offset index, a decrement value, and an address index. When the modular subtraction instruction is executed on the microprocessor, the address index is modified by the decrement value if the address index is not zero and is modified by the offset index if the address index is zero. For example, the address index is repeatedly decremented using the decrement value until it reaches zero, and then the address index is reset back to the offset index. The operand bits may include multiple fields identifying multiple registers selected from the general purpose registers of the microprocessor. The modular subtraction instruction enables access to a buffer in memory in circular fashion by virtue of its operation.
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Jones Darren M.
Kinter Ryan C.
Thekkath Radhika
Tran Chinh Nguyen
Cygiel Gary W
Ellis Kevin L
MIPS Technologies Inc.
Sterne Kessler Goldstein & Fox P.L.L.C.
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