Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Patent
1998-11-17
2000-12-12
Black, Thomas G.
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Multiple or variable intervals or frequencies
713600, G06F 104
Patent
active
061611883
ABSTRACT:
A microprocessor is provided having selective control features to determine its core-to-bus clock ratio. The microprocessor includes a fuse and buffer/control logic. The fuse, fabricated on the microprocessor's metalization or poly layer, can be blown with a laser during fabrication. When blown, the fuse provides a permanent state that prescribes a fixed core-to-bus clock ratio. The buffer/control logic is coupled to the fuse. The buffer/control logic accepts the permanent state and directs the microprocessor to set the core-to-bus clock ratio to a fix value, thus disabling control of the core-to-bus clock ratio via external clock ratio control signals.
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Gaskins Darius D.
Henry G. Glenn
Black Thomas G.
Huffman James W.
Huffman Richard K.
IP-First L.L.C.
Wang Mary
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