Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program
Reexamination Certificate
1999-12-23
2004-03-09
Lee, Thomas (Department: 2185)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Loading initialization program
Reexamination Certificate
active
06704865
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a method for booting a microprocessor's application software and more particularly, to a booting method having a conditional deterministic reset vector.
BACKGROUND OF THE INVENTION
In general, a microprocessor's operation includes a process for initializing, or beginning, its own internal logic and/or intended software application, also known as a boot method. Within the microprocessor's internal initialization logic is a reset vector that is used to point to the location of the executing instructions for the operating system or other application software.
Typically, existing boot methods for application software jump to a fixed address in memory space, and then begin executing the software application at the fixed memory location. One of the most common methods for accomplishing this objective is the use of a power-on reset vector. The reset vector is in a fixed memory location. The microprocessor reads the data in the reset vector location, which contains a pointer for the location of the memory address to begin executing the application software.
The fixed reset vector method has straightforward logic associated therewith. Upon power-on, a microprocessor will load its program counter, a register containing the current address for executing the software application, with the data contents stored in the reset vector's memory address. So for example, the reset vector has addresses $FFFE and $FFFF which contain the data 0F and 2E. During power-on reset, the microprocessor will load the data contents of $FFFE and $FFFF into the microprocessor's program counter register. At this point, the program counter register contains the data $0F2E, which is an address in memory space that contains the boot software for the intended software application. The data content of the fixed reset vector is the first address for the executable software. So the executable software must always remain at this fixed memory address location.
A problem that is often encountered with this prior art method is that the reset vector logic creates problems when the application's programmable memory is erased. Erasing the programmable memory, which is sometimes done when the microprocessor is reprogrammed, will leave the reset vector and the application boot software in an erased, or blank, state, which can cause serious, if not unrecoverable, errors.
For example, before a microprocessor can be reprogrammed, the memory space must be erased. If the reset vector is erased, or left blank, the microprocessor has no way of locating either booting or execution software for the application software upon power-on reset. The result is that the microprocessor cannot be re-booted to allow for reprogramming. This situation is sometimes referred to as a “braindead” processor. A “braindead” processor cannot communicate to enable the programming of its memory space.
One way to overcome this problem, is to design a microprocessor having a non-erasable address dedicated for boot-memory. In this design, the reset vector and its data are located in the non-erasable address dedicated to boot memory. Therefore, the reset vector and boot software are available to the microprocessor if a power-on reset occurs during a reprogramming event. Communication routines can also be added to the non-erasable boot memory to allow for programming of the application memory. However, the use of dedicated non-erasable boot memory space can be very expensive and is difficult to change making it inflexible.
In the automotive industry in particular, flexibility is key to the small controllers that are used in many automotive applications. Due to size and weight restrictions, automotive applications often employ these small controllers and the controllers are often reprogrammed for upgrades, requiring the memory be erased. Dedicating non-erasable memory space on these small controllers is contrary to the need for flexibility.
SUMMARY OF THE INVENTION
The present invention is a conditional reset vector method. According to the present invention, the microprocessor will always have boot software in memory space that can be located and executed.
According to the present invention, the reset vector contains conditional logic that determines the memory location of the executable software. The microprocessor's conditional logic software is used to conditionally determine where executable software is in memory space. For example, an IF, THEN, ELSE statement, a DO WHILE loop, or an DO UNTIL loop, are all options available within a microprocessor that can be manipulated to provide logic to conditionally determine the location of a memory space containing executable software. The actual conditions for the logic statements will depend on the specific application.
It is an object of the present invention to create a fail-safe method for booting a microprocessor. It is another object of the present invention to create a fail-safe method for booting application software on a microprocessor. Yet another object of the present invention is to provide a booting system for a microprocessor that avoids “brain death” of the microprocessor when the programmable memory is erased for microprocessor reprogramming.
REFERENCES:
patent: 4562495 (1985-12-01), Bond et al.
patent: 5263168 (1993-11-01), Toms et al.
patent: 5327531 (1994-07-01), Bealkowski et al.
patent: 5418918 (1995-05-01), Vander Kamp et al.
patent: 5432927 (1995-07-01), Grote et al.
patent: 5938764 (1999-08-01), Klein
patent: 6003130 (1999-12-01), Anderson
patent: 6202091 (2001-03-01), Godse
patent: 6289426 (2001-09-01), Maffezzoni et al.
patent: 6330634 (2001-12-01), Fuse et al.
patent: 6425079 (2002-07-01), Mahmoud
Chang Eric
Chmielewski Stefan V.
Delphi Technologies Inc.
Funke Jimmy L.
Lee Thomas
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