Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2000-06-21
2002-10-01
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06460172
ABSTRACT:
FIELD
The invention relates to integrated circuits, and more specifically to user-programmable microprocessor based mixed signal integrated circuits; it also relates to emulation tools, and especially to hardware-software on-chip co-emulation techniques.
BACKGROUND
As the complexity of electronic systems grows, it becomes more and more difficult to follow a traditional design methodology of working separately on different subsystems with different design and prototyping tools. System designers have been craving for flexible prototyping systems onto which they could map large designs to validate them before fabrication, but only microprocessor emulators and digital configurable arrays, such as FPGAs, have been available in the past. In a further step, analog programmable arrays have also appeared recently to provide fast prototyping possibilities for analog applications.
Currently mixed-signal applications are typically solved in three domains: digital hardware, analog hardware, and microprocessor programs. It is normal for a medium complexity mixed signal integrated circuit to integrate a microprocessor core to run a user program, some digital hardware for control purposes and an analog subsystem for data acquisition or analog applications. In such case, the typical designer normally follows a discrete methodology: an assembler-compiler-debugger for the microprocessor program, a design entry tool (either schematic capture or HDL) and a digital simulator for the digital hardware, and an analog simulator for the analog subsystem. The main drawback for a user of this methodology is that the design is conceived and designed separately and it turns out to be difficult to control the interfaces between these three domains. The situation is also bleak in prototyping; the best solution normally is to use a field programmable gate array (FPGA) for the digital hardware, some discrete ICs or (only recently) an analog array for the analog hardware, and a microprocessor emulator for the user program. Again, a completely different development system has to be used for each part, and special care has to be taken when designing the different interfaces.
Much effort has been put into an integrated methodology. First, the microcontrollers solved the problem of interfacing a microprocessor with typical hardware applications such as timers, ADCs, general purpose digital I/O ports, serial communication interfaces, and so forth. Furthermore, FPGA vendors have created or tried to create easy-to-use interfaces between FPGAs and microprocessors in a way that could make it possible to easily map hardware peripherals onto the microprocessor address space. On the other hand, several optimized mixed-signal simulation tools and even mixed-signal prototyping devices have also been reported.
SUMMARY
It is an object of the invention to provide a user-programmable integrated circuit that would include over the same silicon die a) a set of programmable logic cells such as the ones used in already reported FPGAs; b) a set of programmable mixed signal and analog cells, in particular the necessary circuitry for signal conditioning acquisition and generation, such as operational amplifiers, filters, comparators, analog-to-digital converters (ADCs) and digital-to-analog converters (DACs); c) a microprocessor used both for controlling and configuring the whole system and for running general purpose user programs; and d) optimized interfaces between these three blocks that would allow the user to read the digital signals implemented in the programmable logic array as memory locations in real time, directly interface the digital part of the analog and digital signals from the microprocessor and from the programmable logic, and configure and dynamically reconfigure all the programmable features of the system with the microprocessor, between countless other possibilities.
Another object of the invention is the inclusion of a multiple number of memory cells for each configuration cell to allow the programmable device switch its configuration in a very fast time to then change its functionality in part or in whole without the need of stopping the current device operation at all. A set of stored information necessary to support one configuration of the device is termed a “context.”
It is also an object of the invention to provide a multi-context device capable of storing and quickly switching configurations without having to reload them or to stop the operation of the user application being running at a given moment.
Yet another object of the invention is a methodology for exploiting the integrated circuit described above; the methodology, schematically shown in
FIG. 4
, is an integration of all the tools used for each of the three architectures included in the chip (programmable digital hardware, programmable analog hardware, and microprocessor software), and it particularly includes an integrated emulator that links the user circuit entered with schematics and/or a Hardware Description Language (HDL) with a hardware/software co-emulation and open simulation engines, in a way that makes possible to specify and co-emulate hardware and mixed-signal (analog and digital) general purpose applications in real time over the single silicon chip.
The invention further relates to a Field Programmable System-on-a-Chip (or FIPSOC for short), a new approach to system prototyping of mixed signal applications, comprising a mixed signal device with on-chip microprocessor, suitable user-friendly CAD tools to program it and a set of library macros and applications to provide an easy path for migration to ASIC. The chip comprises a RAM based, multi-context dynamically re-configurable lookup table (LUT) section and includes large granularity logic cells targeted for synthesis programs, programmable analog blocks with configurable interconnectivity and an optimized interface to the on-chip microprocessor core. The microprocessor can read and write both the configuration and the internal signals (digital and analog) while in operation, providing a powerful workbench for real time probing, hardware-software interaction and applications based on dynamic reconfiguration (two configuration contexts are stored so the user can swap them out with a microprocessor command without having to stop the user application running over the programmable substrate). The CAD design flow includes mixed signal design specification, simulation, automatic technology mapping, device programming, and real time emulation (probing of internal signals), so the user can work at system level with microprocessor code and mixed-signal hardware using an integrated design tool. Finally, library macros are provided to support typical user applications and to provide an immediate way to migrate the application to ASIC after prototyping.
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“FIPSOC Mixed Signal System-on-Chip”,SIDSA, pp. 1-4.
Faura Enriquez Julio
Insenser Farre Jose Maria
Dinh Paul
Merchant & Gould P.C.
Semiconductors Investigacion Diseno, S.A. (SIDSA)
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