Microprocessor and device including memory units with...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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C711S003000, C711S123000, C711S125000

Reexamination Certificate

active

06862675

ABSTRACT:
A main memory and a higher-speed local memory are externally connected to a microprocessor. The entire load module is developed in the main memory. A part or all of the instruction codes in the load module developed in the main memory are stored in the local memory. A memory management unit for data converts a logical address of the entire load module into a physical address of the main memory. A memory management unit for instructions converts a logical address of the instruction code stored in the local memory into a physical address of the local memory. A CPU core gains the instruction code from the local memory at the time of execution of the instruction.

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“The 68040 On-Chip Memory Subsystem”, Robin Edenfield et al,Computer Society International Conference, Spring Meeting, Feb. 26,-Mar. 2, 1990, Vol. Conf. 35, pp. 264-269.
“The DSP32C: AT&T's Second Generation Floating-Point Digital Signal Processor”, Michael Fuccio et al,IEEE Micro, Dec. 1, 1988, vol. 8, No. 6, pp. 30-47.
Edenfield, Robin, et al, “The 68040 On-Chip Memory Subsystem”, Computer Society International Conference, IEEE Comp. Soc. Press, Vol Conf. 35, Feb. 1990, p. 264.
Fuccio, Michael L., “THe DSP32C: AT&T's Second-Generation Floating-Point Digital Signal Processor”, IEEE Micro, vol. 8, No. 6, Dec. 1998, 1st page, unknown page number.

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