Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2000-09-26
2003-10-28
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S107000, C438S110000, C438S617000
Reexamination Certificate
active
06638789
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the packaging of electronic components. More particularly, the present invention relates to a method of fabricating a micromachine package.
2. Description of the Related Art
Micromachine sensing elements (hereinafter micromachines) are well known. A micromachine included a miniature moveable structure, such as a bridge, cantilevered beam, suspended mass, membrane or capacitive element, which was supported over a cavity formed in a silicon wafer. Since the operation of the micromachine depended upon the moveability of the miniature moveable structure, it was critical that the package, which included the micromachine, did not contact the miniature moveable structure in any manner.
FIG. 1
is a cross-sectional view of a structure
8
during the formation of a plurality of micromachine packages in accordance with the prior art. As shown in
FIG. 1
, a silicon wafer
10
included a plurality of micromachine chips
12
. Micromachine chips
12
included micromachine areas
14
formed in an upper surface
10
U of wafer
10
. Micromachine areas
14
included the miniature moveable structure of the micromachine. Micromachine chips
12
further included bond pads
16
on upper surface
10
U of wafer
10
. Bond pads
16
were connected to the internal circuitry of micromachine chips
12
.
Micromachine chips
12
were integrally connected together in an array format. Each of micromachine chips
12
was delineated by a singulation street
20
, which was located between adjacent micromachine chips
12
.
A silicon lid
30
formed from a silicon wafer was positioned above wafer
10
. Lid
30
included a plurality of caps
42
integrally connected to one another. Each cap
42
included a micromachine cavity
32
. Each micromachine cavity
32
was positioned over a corresponding micromachine area
14
. Generally, micromachine cavities
32
were wider than micromachine areas
14
.
Each cap
42
further included a bond pad cavity
34
. Each bond pad cavity
34
was positioned over a corresponding set of bond pads
16
on a micromachine chip
12
. Generally, bond pad cavities
34
were wider than bond pads
16
, and were at least as deep as bond pads
16
were tall.
FIG. 2A
is a cross-sectional view of structure
8
of
FIG. 1
at a further stage in fabrication in accordance with the prior art. As shown in
FIG. 2A
, lid
30
was attached to wafer
10
. Micromachine cavities
32
were positioned above corresponding micromachine areas
14
. Further, bond pad cavities
34
were positioned above corresponding sets of bond pads
16
.
FIG. 2B
is a cross-sectional view of structure
8
of
FIG. 2A
at a further stage of fabrication in accordance with the prior art. Referring to
FIG. 2B
, a series of shallow cuts were made to remove a portion of each cap
42
to expose bond pads
16
. Micromachine chips
12
were electrically tested by connecting test probes to bond pads
16
. Should testing of a micromachine chip
12
indicate that the micromachine chip
12
was defective, the micromachine chip
12
and/or corresponding cap
42
was marked. For example, micromachine chip
12
A was marked as being defective. Wafer
10
was then singulated along singulation streets
20
. Micromachine chips
12
which were marked as defective were discarded.
Disadvantageously, a cap
42
was attached to a micromachine chip
12
even if the micromachine chip
12
was defective. The cap
42
and defective micromachine chip
12
were discarded. However, since a cap
42
was attached to the defective micromachine chip
12
, the cost associated with the defective micromachine chip
12
was increased compared to the cost associated with the defective micromachine chip
12
alone. This increased the cost of fabricating each batch of micromachine packages. This, in turn, increased the cost of fabricating each individual micromachine package which passed testing.
After singulation of wafer
10
, each good micromachine chip
12
with cap
42
was further packaged.
FIG. 3
is a cross-sectional view of a single micromachine package
40
in accordance with the prior art. As shown in
FIG. 3
, micromachine chip
12
and cap
42
were attached to a substrate
60
. Bond pads
16
were electrically connected to traces
44
by bond wires
46
. To prevent accumulation of static charge on cap
42
, which would render micromachine chip
12
inoperable, cap
42
was electrically connected to a ground trace
48
by a bond wire
50
. Ground trace
48
was grounded during use. Although effective at prevent accumulation of static charge on cap
42
, grounding cap
42
by electrically connecting cap
42
to ground through bond wire
50
and ground trace
48
was relatively labor intensive and complex, which increased the cost of fabricating package
40
.
A controller chip
52
, which was the controller for micromachine chip
12
, was also attached to substrate
60
. Bond pads
62
of controller chip
52
were electrically connected to traces
44
by bond wires
46
.
By integrating controller chip
52
with micromachine chip
12
into a single package
40
, several advantages were realized as compared to attaching controller chip
52
and micromachine chip
12
separately as separate packages to the printed circuit mother board. One advantage was that less labor was required during component attachment to the printed circuit mother board. As a result, the cost of the electronic device employing package
40
was reduced. Another advantage was a reduction in final functional device size. However, when compared to a standard micromachine package containing only a single micromachine chip
12
, i.e., without controller chip
52
, package
40
was considerably larger, had reduced electrical performance and was significantly more expensive.
SUMMARY OF THE INVENTION
In accordance with the present invention, a micromachine package includes a micromachine chip having an active area, e.g., a micromachine area, in a front surface of the micromachine chip. The package further includes a controller chip having a rear surface and a front surface. An upper bond pad is on the front surface of the controller chip. A bead secures the rear surface of the controller chip to the front surface of the micromachine chip.
By mounting the controller chip directly on the micromachine chip, the size of the package is substantially reduced compared to a conventional package having a micromachine chip and controller chip in a side-by-side arrangement. More particularly, the size of the package in accordance with present invention is only slightly larger than the size of the micromachine chip.
Advantageously, a cavity above the micromachine area is formed by the bead and the controller chip. Accordingly, the cap of the prior art, which protected the micromachine area, is eliminated. Since the cap is eliminated, the prior art requirement of grounding the cap is likewise eliminated. Accordingly, the package is fabricated at a lower cost than a micromachine package of the prior art.
To further reduce the costs associated with the micromachine package, in one embodiment, a plurality of controller chips are attached to a plurality of micromachine chips while the micromachine chips are integrally connected together, e.g., while still in wafer form.
Illustratively, to attach a controller chip, a bead is applied to a rear surface of the controller chip. The controller chip further includes upper bond pads on a front surface of the controller chip. The controller chip is positioned above the micromachine area. The bead is attached to the front surface of the micromachine chip thus mounting the controller chip to the micromachine chip.
Advantageously, the controller chips are attached only to the micromachine chips which have been tested and found to be good. In this manner, waste of the controller chips is avoided and labor associated with attaching the controller chips to defective micromachine chips is saved.
In an alternative embodiment, the bead is applied to the front surface of the mi
Glenn Thomas P.
Hollaway Roy Dale
Webster Steven
Amkor Technology Inc.
Gunnison McKay & Hodgson, L.L.P.
Hodgson Serge J.
Nguyen Dilinh
LandOfFree
Micromachine stacked wirebonded package fabrication method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Micromachine stacked wirebonded package fabrication method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Micromachine stacked wirebonded package fabrication method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3127239