Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
1998-01-14
2001-04-17
Butler, Dennis M. (Department: 2182)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S322000, C713S601000
Reexamination Certificate
active
06219797
ABSTRACT:
BACKGROUND OF THE PRESENT INVENTION
1. Field of the Invention
The present invention relates to integrated circuit electronic devices, and, more particularly, to microcomputers, microcontrollers, and microprocessors.
2. Background and Objects of the Present Invention
The demand for ever higher performance from computers generally, and microprocessors and microcontrollers in particular, has led to various enhancements, including higher clock rates and simpler instruction sets. Consequently, the control and flexibility of clock speeds and rates for all circuits, especially microprocessor and microcontroller integrated circuits, has become critical, as designers attempt to design faster and faster microprocessors and microcontrollers. Previous control systems for oscillators were simplistic and/or relied primarily on prewired hardware circuits, which are not very flexible.
SUMMARY OF THE INVENTION
Preferred system embodiments of the disclosed CMOS 8-bit Microcontroller System Specification have a number of unique features. Preferred embodiments provide the software control of either an external crystal oscillator or an on-chip internal ring oscillator, so that the user can choose whether to use external crystal oscillator or internal ring oscillator as the main source clock to the system. Preferred embodiments also provide for software control to disable/enable the external oscillator while running from the internal ring oscillator, so that the user has the ability to disable an external oscillator to reduce current consumption tremendously. Preferred embodiments also provide for software control to divide the main system clock (ring or external crystal oscillator) to provide lower operating current, so that the user can change system clock divide ratio to lower operating current. Preferred embodiments have software enable/disable of a “Switch-back” mode to allow interrupts or serial port activity to immediately switch high divide ratios (slow clocks) to a lower divide ratio (high speed clocks), which allows switching back immediately in the event of interrupts or serial port activity, it will process information as soon as possible without losing any kind of data. Preferred embodiments also enable the software selection of a DX2 clocking system in which the DX2 clock generator is software enabled/disabled and provides 2× frequency multiplication of the crystal oscillator for use as an optional system clock source, so that the frequency is doubled. Preferred embodiments also provide a frequency doubler with 50 percent duty cycle.
Preferred embodiments have the following features and advantages: compatible with Intel 80C52 (in that preferred embodiments have pin orientation and instruction sets that are compatible with the Intel 8051, four 8-bit I/O ports, three 16-bit timer/counters, and 256 bytes scratchpad RAM); large on-chip memory (16K bytes EPROM (OTP) and 1K byte extra on-chip SRAM for MOVX); ROMSIZE Feature (selects effective on-chip ROM size from 0 to 16K; allows access to entire external memory map; dynamically adjustable by software and useful as boot block for external FLASH); High-Speed Architecture (4 clocks/machine cycle (Intel 8051 has 12); Runs DC to 33 MHz clock rates; Single-cycle instruction in 121 nS; Dual data pointer; Optional variable length MOVX to access fast/slow RAM/peripherals; Power Management Mode (Programmable clock source to save power; CPU runs from (crystal/64) or (crystal/1024); provides automatic hardware and software exit); EMI Reduction Mode disables ALE; two full-duplex hardware serial ports; High integration controller (power-fail reset; early-warning power-fail interrupt; programmable Watchdog timer); and 16 total interrupt sources with 6 external. Preferred embodiments have 40-pin PDIP, 44-pin PLCC, 44-pin PQFP, and 40-pin windowed CERDIP packages.
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Adams Matt
Grider Steve
Little Wendell
Liu Shyun
Butler Dennis M.
Dallas Semiconductor Corporation
Jenkens & Gilchrist
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