Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
1999-09-28
2002-04-23
Ellis, Kevin L. (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
Reexamination Certificate
active
06378034
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a microcomputer with an electrically erasable and programmable read-only memory (EEPROM).
2. Description of the Related Art
Conventional microcomputers of this type have several communication modes to communicate programming data in a flash programming mode. The user selects a particular communication mode for the flash programming.
In the aforementioned microcomputer, a terminal not used in the flash programming mode requires a terminal circuit exclusively used in the flash programming mode to prevent a current from flow through an input buffer associated with the terminal.
This leads to a problem that the number of parts on a substrate of the microcomputer is increased, the cost thereof soars, and the substrates becomes larger for the following reasons. The communication mode to be selected in the flash programming mode by the user is unknown, and hence the terminal not to be used cannot be determined. Therefore, the input buffer associated with a terminal which may possibly be used in the flash programming mode must be turned on regardless of whether the terminal is actually selected or not.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a microcomputer with a flash EEPROM which does not require a terminal circuit exclusively used in the flash programming mode.
According to one aspect of the present invention, a microcomputer with a flash EEPROM comprises an automatic communication mode determining circuit for determining a communication mode in a flash programming mode and for setting a communication mode signal of the communication mode thus determined to an active level, and control circuits associated with respective input terminals for setting in the flash programming mode, when a communication mode signal of a communication mode corresponding to the input terminal is at an active level, an input buffer associated with the input terminal to an active state.
The automatic communication mode determining circuit automatically determines, in the flash programming mode, a communication mode to be employed in the flash programming, generates a communication mode signal, and delivers the signal to a communication mode signal bus.
To achieve the flash programming, there are provided several communication modes to communicate programming data. For example, two communication modes of a three-wire serial interface (hereinafter referred to as CSI) and an asynchronous serial interface (hereinafter referred to as UART) are provided, and the user selects either one thereof to communicate programming data in the flash programming.
In this case, since CSI terminals or UART terminals are selected by the user, it is impossible to determine beforehand which one will be used.
For a terminal which may be used or may not be used depending on a communication mode, an output (a communication mode signal) is acquired from the communication mode signal bus in the flash programming mode and is outputted as an input buffer control signal. This causes an input buffer associated with the terminal not used in the flash programming to turn off to thereby prevent a current from flow through the input buffer.
For a terminal for which it is known beforehand that the terminal is not used, an input buffer inactive level signal is selected in the flash programming mode to be delivered as an input buffer control signal. This causes an input buffer of the terminal not used in the flash programming to turn off to thereby prevent a current from flowing through the input buffer.
Since a current is prevented from flowing through the input buffer without any terminal processing on a substrate, a terminal circuit exclusively used in the flash programming mode can be dispensed with on the substrate. This leads to a reduction in cost and size of the substrate of the microcomputer.
According to another aspect of the present invention, a microcomputer with a flash EEPROM comprises, in place of the automatic communication mode determining circuit, communication mode selecting signal input terminals for each communication mode. In the flash programming mode, when an active communication mode signal is supplied from the communication mode selecting signal input terminal of a communication mode associated with the pertinent input terminal, the input buffer associated with the-input terminal is activated.
The above and other objects, features, and advantages of the present invention will become apparent from the following description with reference to the accompanying drawings which illustrate examples of the present invention.
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Ellis Kevin L.
Hayes & Soloway P.C.
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