Microcomputer operable with external and internal clock signals

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis

Reexamination Certificate

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Details

C327S018000, C327S020000, C331S049000, C331S059000

Reexamination Certificate

active

06782485

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a microcomputer and more particularly, to a microcomputer operable to be synchronized with an internal clock signal generated in the microcomputer itself when an external oscillator element is connected and with an external clock signal provided from the outside of the microcomputer.
2. Description of the Related Art
Conventionally, microcomputers of this type, which have been extensively used as control computers for controlling various instruments, are provided with oscillation circuits for generating an internal clock signal. An example of the oscillation circuits of the conventional microcomputers of this type is shown in
FIG. 1
, which is disclosed in the Japanese Non-Examined Patent Publication No. 11-7333 published in January 1999.
The conventional oscillation circuit shown in
FIG. 1
comprises three external terminals X
1
, X
2
, and IN, an inverting amplifier circuit
111
, an inverted
107
, and a buffer amplifier
108
.
The terminal X
1
is used for connection of an external oscillation element (not shown) such as a quartz or crystal oscillator provided outside. The terminal X
2
is used for connection of an external oscillator element (not shown) such as a quartz or crystal oscillator provided outside or for receiving an external clock signal. The terminal IN is used for receiving an external selection signal for selecting whether an external oscillator element is connected across the terminals X
1
and X
2
or an external clock signal is directly supplied to the terminal X
2
.
The inverting amplifier circuit
111
comprises two p-channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs)
101
and
102
connected in series, two n-channel MOSFETs
103
and
104
connected in series, an n-channel MOSFET
105
, and an inverter
106
. The source of the MOSFET
102
is connected to the power supply line supplied with a supply voltage V
DD
by way of the MOSFET
101
. The drain of the MOSFET
102
is connected to the drain of the MOSFET
103
. The source of the MOSFET
103
is connected to the ground by way of the MOSFET
104
. The gazes of the MOSFETs
102
and
103
are coupled together to form the input terminal of the circuit
111
, which is connected to the terminal X
1
. The drain of the MOSFETs
102
and
103
are coupled together to form the output terminal of the circuit
111
, which is connected to the terminal X
2
and the input terminal of the buffer amplifier
108
.
The gate of the MOSFET
101
is connected to the output terminal of the inverter
106
. The gaze of the MOSFET
104
is connected to the gate of the MOSFET
105
and the input terminal of the inverter
106
. The source and drain of the MOSFET
105
are respectively connected to the terminals X
1
and X
2
.
The input terminal of the inverter
107
is connected to the terminal IN. The output terminal of the inverter
107
is connected to the gates of the MOSFETs
104
and
105
and the input terminal of the inverter
106
The output terminal or the buffer amplifier
108
emits an internal clock signal &phgr; for inner circuits (not shown) of the conventional microcomputer.
With the conventional oscillator circuit shown in
FIG. 1
, when the selection signal applied to the terminal IN is in the logic-low (L) level, both the MOSFETs
101
and
104
are turned on and at the same time, the MOSFET
105
is turned on. Thus, the inverting amplifier circuit
111
is activated, thereby conducting its self-biasing and inverting-amplification operations. On the other hand, when the selection signal applied to the terminal IN is in the logic-high (H) level, both the MOSFETs
101
and
104
are turned off and at the same time, the MOSFET
105
is turned off. Thus, the circuit
111
is inactivated and kept in the high impedance (Hi-Z) state.
When an external oscillator element is connected across the terminals X
1
and X
2
, the selection signal in the L level is applied to the terminal IN to activate the inverting amplifier circuit
111
. Thus, the terminal X
1
is self-biased and the signal fed back through the oscillator element is inverting-amplified. This means that the external oscillator element and the amplifier circuit
111
constitute an “oscillation circuit” for generating the internal clock signal &phgr;. The internal clock signal &phgr; thus generated is outputted by way of the buffer amplifier
108
and then, it is supplied to the internal circuit of the microcomputer for its normal operation.
Also, an external reset signal (not shown) is applied to the internal circuit. In this case, the internal circuit is initialized and then, it starts the specific operations according to the signal &phgr;.
On the other hand, when no external oscillator element is connected across the terminals X
1
and X
2
, the selection signal in the H level is applied to the terminal IN, inactivating the inverting amplifier circuit
111
. Thus, the circuit
111
is brought to the Hi-Z state, where an external clock signal can be applied to the terminal X
2
. In this case, an external clock signal applied to the terminal X
2
is sent to the internal circuit of the microcomputer as the internal clock signal &phgr; by way of the buffer amplifier
108
.
The internal circuit is initialized by an external reset signal (not shown) and then, it starts the specific operations according to the signal &phgr;.
As explained above, with the conventional oscillator circuit of the conventional microcomputer shown in
FIG. 1
, the selection signal needs to be applied to the terminal IN in order to select whether an external oscillator element is connected across the terminals X
1
and X
2
or an external clock signal is directly applied to the terminal X
2
. As a result, one of the external terminals of the conventional microcomputer has to be assigned to the input of the selection signal in spite of the count (i.e., the total number) of the external terminals being limited. This fact causes a problem that the count of the external terminals applicable to signal input or output (i.e., the count of the programmable input/output terminals for a user) is decreased.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a microcomputer that eliminates the need of input of a selection signal to select whether an external oscillator element is connected to generate an internal clock signal or an external clock signal is inputted to generate an internal clock signal.
Another object of the present invention is to provide a microcomputer that increases the count of programmable or usable input/output terminals for a user.
Still another object of the present invention is to provide a microcomputer that ensures its stable operation.
The above objects together with others not specifically mentioned will become clear to those skilled in the art from the following description.
According to a first aspect of the present invention, a microcomputer is provided. This microcomputer comprises:
(a) a first terminal and a second terminal which are connectable to an external oscillation element;
the second terminal being able to receive an external clock signal when the external oscillation element is not connected;
(b) a third terminal for receiving an external reset signal;
(c) an amplifier circuit for constituting an oscillation circuit along with an external oscillation element when the external oscillation element is connected across the first terminal and the second terminal;
the oscillation circuit being used for generating an oscillation signal;
(d) an internal clock signal output circuit for outputting an internal clock signal corresponding to the oscillation signal generated by the oscillation circuit or the external clock signal;
the internal clock signal being used for operating an internal circuit of the microcomputer;
(e) an internal reset signal generation circuit for generating an internal reset signal corresponding to the external reset signal;
the internal reset signal being used for resetting the inner circuit for

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