Microcomputer minimizing influence of bus contention

Details Microcomputer minimizing influence of bus contention Microcomputer minimizing influence of bus contention

2007-02-13

2007-02-13

Rinehart, Mark H. (Department: 2111)

Electrical computers and digital data processing systems: input/

Access arbitrating

Centralized arbitrating

C710S107000, C710S240000

Reexamination Certificate

active

11069013

ABSTRACT:
An edge detecting circuit detects an input level change (edge) of a synchronous signal provided from a synchronous signal input terminal. A data latch unit latches digital data provided from an external data input terminal. An address generating circuit provides an address signal. A write control unit activates/deactivates a write enable signal for writing to a RAM. An arbitration circuit monitors a write control enable signal, a read enable signal and a write enable signal, and detects a cycle, in which a CPU does not access the RAM.

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