Microcomputer, method of controlling cache memory, and...

Details Microcomputer, method of controlling cache memory, and... Microcomputer, method of controlling cache memory, and...

2006-02-28

2006-02-28

Anderson, Matthew D. (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

Reexamination Certificate

active

07007134

ABSTRACT:
A microcomputer that can increase the usage efficiency of a cache memory and increase the process speed is provided. In this microcomputer, a group of registers hold cache usage information that specifies whether the cache memory is to be used in execution of a process. When processes to be executed are switched, a process switch control circuit obtains the cache usage information of the next process from the group of registers, and stores the cache usage information in a first register. After the storing of the cache usage information in the first register, a cache control circuit stores the cache usage information in a second register. In accordance with the cache usage information stored in the second register, the cache control circuit puts the cache memory in a usable state or an unusable state.

REFERENCES:
patent: 5319760 (1994-06-01), Mason et al.
patent: 5974438 (1999-10-01), Neufeld
patent: 6230230 (2001-05-01), Joy et al.
patent: 6751706 (2004-06-01), Chauvel et al.
patent: 6757771 (2004-06-01), Christie

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