Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2000-04-13
2003-12-09
Baderman, Scott (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S030000, C711S103000, C717S168000
Reexamination Certificate
active
06662314
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a microcomputer suitable for debugging under a practical use environment.
2. Description of Related Art
Conventionally, debugging tools such as ICE (emulator) have been used for debugging microcomputers installed in microcomputer-applied systems and so on. If a flash-memory is integrated in the microcomputer, the need for rewriting data into such a flash-memory arises at the time of debugging. However, the conventional debugging tools do not have any means for rewriting data into the flash-memory of the microcomputer. Therefore, the rewriting procedure is performed through the use of a flash writer. The flash writer is a tool designed specifically for rewriting data into the flash-memory. Alternatively, the user may prepare a program for rewriting data into the flash-memory. In this case, the debugging tool executes such a program to rewrite data into the flash-memory.
Since the conventional microcomputer is configured as described above, there are some problems that need to be addressed.
The cost of debugging the microcomputer is high because the flash writer should be prepared in addition to the debugging tool if the user debugs the conventional microcomputer through the use of the flash writer. Also, an appropriate flash writer should be selected so as to correspond to the type of the flash-memory. Thus, the type of flash writer varies every time the configuration of flash-memory device changes. Consequently, reductions in debugging efficiency have occurred.
Furthermore, the rewriting procedure using the debugging tool must be performed by the execution of a program for rewriting data into the flash-memory. In this case, however, such a program must be prepared by the user at much expense in time and effort. Therefore, debugging inefficiency results.
Another problem is that the configuration of the conventional microcomputer restricts the capabilities of the debugging tool. That is, the procedure described above for rewriting data into the flash-memory cannot control a rewrite operation on the flash-memory directly from the debugging tool, so that they cannot use the debugging functions (e.g., a software-break function) associated with the rewrite of the flash-memory.
SUMMARY OF THE INVENTION
The present invention is implemented to solve the foregoing problems. It is therefore an object of the present invention is to provide a microcomputer that permits a direct control of the rewriting of an internal flash-memory to enhance the efficiency of debugging operation.
According to first aspect of the present invention, there is provided a microcomputer comprising: a first storage means that stores a program for rewriting data into an internal flash memory, a second storage means that stores internal flash information about the internal flash memory; an interface that makes a connection to a debugging tool; and a CPU, wherein the CPU allows reading of the internal flash information by the debugging tool through the interface, receiving of write data based on the internal flash information from the debugging tool through the interface, and rewriting of the write data as new contents into the internal flash memory in accordance with the program for rewriting data into the internal flash memory.
Here, the first storage means may be at least a part of an internal flash memory.
The program for rewriting data into the internal flash memory may comprise an E/W mode conversion program for shifting to a mode that allows an erase operation and an write operation on the internal flash memory; an erase program for erasing contents of the internal flash memory; a write program for writing new contents into the internal flash memory; a status-ready wait program for indicating the completion of the erase operation and the write operation; and an E/W mode completion program for returning from a mode that allows both erase and write operations on the internal flash memory to a normal mode.
The second storage means may be at least a part of an internal flash memory.
The internal flash information may include: block information about block sizes and addresses of the internal flash memory; and rewrite program information about the leading addresses of the rewrite program.
The internal flash information may include information that indicates a location of storing a security code.
The internal flash information may include information that indicates locations of areas to be used for saving the rewrite program of the internal flash memory and holding the write data temporary.
The internal flash information may include information about a size of the area to be used for holding the write data temporary at the time of rewriting the internal flash memory.
According to a second aspect of the present invention, there is provided a microcomputer comprising: a first storage means that stores a program for rewriting data into the internal flash memory; a second storage means that stores internal flash information about the internal flash memory; an interface that makes a connection to a debugging tool; and a CPU, wherein the CPU allows execution of debugging based on an instruction code of a debug program held in a first register by the debugging tool through the serial interface in conjunction with holding internal flash information stored in the second storage means in a second register so that the internal information is readable by the debugging tool through the serial interface, and a rewrite operation in which write data based on the internal flash information held in a third register is written into the internal flash memory in accordance with the program for rewriting data into the internal flash memory by the debugging tool through the serial interface.
Here, the serial interface may be a JTAG interface.
The microcomputer may further comprise: a means for rewrite permission that allows rewriting of the internal flash memory forcefully in debug mode even an input value of a FP terminal that permits rewriting of the internal flash memory.
The microcomputer may further comprise: a means for executing an E/W mode conversion program for shifting to a mode that allows an erase operation and an write operation on the internal flash memory by the CPU based on a branch instruction code for a E/W mode conversion program which is produced from the debugging tool; a means for executing an erase program for erasing a block corresponding to an address of the internal flash memory produced from the debugging tool through the execution of the erase program by the CPU based on the branch instruction code for the E/W mode conversion program which is produced from the debugging tool; a means for executing a status-ready wait program by the CPU based on a branch instruction code for a status-ready wait program which is produced from the debugging tool. to allow that the debugging tool to read out information about the status of executing the erase operation on the internal flash memory; and an E/W mode completion program for a shift to a normal mode through the execution of an E/W mode completion program by the CPU based on a branch instruction code for the E/W mode termination program produced from the debugging tool after repeating the execution of both means for executing the erase program and status-ready wait program only a predetermined number of times in accordance with blocks to be cleared from the internal flash memory if the information about the status of executing the erase operation on the internal flash memory is recognized as normal.
The microcomputer may further comprise: a means for executing an E/W mode conversion program for shifting to a mode that allows an erase operation and an write operation on the internal flash memory by the CPU based on a branch instruction code for a E/W mode conversion program which is produced from the debugging tool; a means for executing an erase program for erasing a block corresponding to an address of the internal flash memory produced from the debugging tool through the execution of
Fukuzawa Fumitaka
Iwata Shunichi
Nasu Takashi
Bonura Tim M.
Burns Doane , Swecker, Mathis LLP
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