Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2005-10-25
2005-10-25
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S103000, C712S032000, C712S037000
Reexamination Certificate
active
06959365
ABSTRACT:
A microcomputer with a built-in flash memory is obtained in which the flash memory can be properly rewritten with a rewrite program kept placed on the flash memory and without requiring additional complicated control circuitry. On accepting an erase/write command which constitutes a rewrite command, a flash memory module (2) outputs to a flash memory control circuit (3) a ready status signal RYIBY indicative of a busy state during execution of the series of processing. When the ready status signal RYIBY indicates the busy state, the flash memory control circuit (3) outputs a hold signal HOLD at active “H,” in order to inhibit a CPU (1) from accessing the flash memory module (2). When the ready status signal RYIBY has recovered the ready state, the flash memory control circuit (3) outputs the hold signal HOLD at “L” to allow the CPU (1) to access the flash memory module (2).
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“RTL Design with VHDL”□□The University of British Columbia□□ELEC 379: Design of Digital and Microcomputer systems□□1999/2000 Winter Session, Term 2□□.
Abe Toshihiro
Kasai Yoshio
Ootani Naoki
Sugita Mitsuru
Patel Hetul
Renesas Technology Corp.
Thai Tuan V.
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