Microcomputer having built-in nonvolatile memory for...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Details

C711S155000

Reexamination Certificate

active

06598137

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a microcomputer having a built-in erasable nonvolatile memory, such as EEPROMs, flash memories, and FeRAMs.
BACKGROUND OF THE INVENTION
As an example of a microcomputer having a built-in nonvolatile memory, a 1-chip microcomputer having a built-in EEPROM has been known, and this type of microcomputer has been used extensively as IC cards.
FIG. 16
shows an example memory map of the 1-chip microcomputer used as the IC card.
In this memory map, addresses 0000H-7FFFH are allocated to a 32-kbyte ROM (Read Only Memory) area; addresses 8000H-9FFFH to an 8-kbyte EEPROM area; and addresses FF00H-FFFFH to a 256-byte RAM area.
To address 0000H is a start address, and the addresses 0000H-000FH are allocated to an interrupt vector. The 1-chip microcomputer is arranged in such a manner that a program branches to a ROM's head address whenever the 1-chip microcomputer completes a reset action, and to a ROM's interrupt routine area whenever an interrupt occurs. In other words, the 1-chip microcomputer reads out a program from the ROM's head address at start-up. Interrupt routines are frequently carried out while a program is run, and the program has to return to the ROM's interrupt routine area for each interrupt routine. Thus, in this 1-chip microcomputer, the program should be on the ROM area before it is run. Here, the EEPROM area is used either as a data area or a program area.
On the other hand, 1-chip microcomputers having nonvolatile memories other than EEPROM's, that is, those having built-in flash memories have also been on the market.
FIG. 17
shows an example memory map of the 1-chip microcomputer having a built-in flash memory.
In this memory map, addresses 0000H-7FFFH are allocated to a 32-kbyte flash memory area, and addresses FF00H-FFFFH to a 256-byte RAM (Random Access Memory) area.
Like the 1-chip microcomputer of
FIG. 16
having a built-in EEPROM and used as the IC card, the address 0000H is a start address, and the addresses 0000H-000FH are allocated to an interrupt vector. The flash memory is divided into eight (8) blocks (BLOCKs
0
-
7
) for every 4 kbytes, and data can be erased collectively per block. With this 1-chip microcomputer, the flash memory serving as a nonvolatile memory is provided on the assumption that the entire area is used as a program area. In other words, the flash memory is provided on the precondition that, while the program stored in the flash memory is run, neither can data be written into nor erased from the flash memory.
In order to write a program into the flash memory of the 1-chip microcomputer, the following methods can be adopted.
A first method uses a general PROM writer. In this method, generally, a device equipped with the 1-chip microcomputer is inserted into a socket of the PROM writer through a socket adapter, and data is written directly into the flash memory through an external terminal of the 1-chip microcomputer.
A second method is a popular method, by which data is written into the flash memory by means of a serial communication interface (hereinafter, referred to as SCI) furnished in the 1-chip microcomputer.
FIG. 18
shows an arrangement to carry out the second method. In the drawing, the 1-chip microcomputer
101
is connected to a personal computer
103
through a converting board
102
. A writing program code stored in the personal computer
103
is transferred to the converting board
102
via a data line
104
, and taken into an SCI
106
in the 1-chip microcomputer
101
from the converting board
102
via a serial data line
105
. The program code is sent to a flash memory
108
from the SCI
106
via an internal bus
107
and written therein. A CPU
109
controls the flash memory
108
, and the control program is stored in either a ROM
110
or a RAM
111
.
In case of the 1-chip microcomputer of
FIG. 16
used as the IC card, however, the EEPROM is mainly used for data storage. Thus, most of the program is stored in the non-erasable ROM and only a part thereof is stored in the EEPROM. Because the program stored in the ROM can not be overwritten, it can not be modified significantly. In particular, if the OS or the like of the IC card is stored in the ROM, upgrading the OS or the like is almost impossible.
Multi-application IC cards have been proposed recently, but if they contain the above-arranged 1-chip microcomputers, it is also impossible to additionally write other application programs once the IC card is issued.
Further, when a program different from the one stored in the ROM is additionally stored in the EEPROM so as to use this EEPROM as a data area in accordance with the additionally stored program, the program has to branch to the ROM before the job is started as previously mentioned. This is because, if the memory device (EEPROM) is seen from the CPU end, the same hardware address is assigned to the memory device for execution of both data read-out and data writing actions, but data read-out and data writing actions can not be executed simultaneously at the same address. Also, because the access program stored in the EEPROM as the additional program can not be transferred to the ROM to be stored therein, the access program already stored in the ROM can not be modified as desired. Thus, the program already stored in the ROM, namely a writing/erasing routine, is also used in this case, and therefore, data can not be written into or erased from the EEPROM in accordance with the additional program stored therein.
On the other hand, in case of the 1-chip microcomputer having a built-in flash memory, the flash memory is provided on the provision that it is replaced with a program ROM. Therefore, it is quite difficult to use the same flash memory as the program area and also as the data area simultaneously.
In case that the flash memory is used instead of the ROM, that is, the ROM is omitted, if a program is transferred to the RAM and stored therein, data can be written into/erased from the flash memory. However, if the program is merely transferred to the RAM as described above to use a part of the flash memory as a data area, the following problem occurs.
That is, if an interrupt request signal is generated from another block (for example, if an interrupt request signal
112
is generated from the SCI
106
in
FIG. 18
) when a program is transferred to the RAM from the flash memory and data is written into/erased from the data area in the flash memory in accordance with the program on the RAM, the program branches to the interrupt vector on the flash memory. However, because the data is being written into/erased from the flash memory, the interrupt vector can not be read out, and the system runs away out of control. In particular, this problem becomes apparent when nonvolatile memories including flash memories, etc. are used, because the nonvolatile memories require writing time and erasing time far longer than the CPU's writing and read-out cycle. This problem invariably occurs with any kind of nonvolatile memories (including FeRAM) unless the writing and erasing cycle is matched with the CPU's cycle. Thus, with the conventional 1-chip microcomputer having a built-in flash memory, it is quite difficult to use the same flash memory as the program area and also as the data area simultaneously.
Japanese Laid-open Patent Application No. 278895/1996 (Japanese Official Gazette, Tokukaihei No. 8-278895, publishing date: Oct. 22, 1996) discloses a 1-chip microcomputer having a built-in nonvolatile memory, which is arranged in such a manner so as to avoid the run away of the system when an interrupt occurs while data is being written into/erased from the flash memory by automatically making the interrupt vector jump to the RAM or any other memory.
However, this invention is directed to a technique to stabilize the system when external data is written into the general microcomputer having a built-in flash memory. In other words, this invention is silent about an arrangement to effect the data writing/erasing action with respect t

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