Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program
Reexamination Certificate
2001-01-12
2004-07-20
Gaffin, Jeffrey (Department: 2115)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Loading initialization program
C713S001000, C710S022000, C710S062000, C711S166000
Reexamination Certificate
active
06766448
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a microcomputer which is connected to an external memory via a bus and transfers program data to an internal memory from the external memory and a method of transferring a program thereof, more particularly, to a method of transferring a program by which a program can be transferred and executed fast and efficiently and a microcomputer using the method.
2. Description of the Related Art
FIG. 1
shows one of conventional microcomputers using the aforementioned method of transferring the program.
Referring to
FIG. 1
, in a microcomputer
110
, user programs to be executed are written to an internal RAM
111
which is readable and writable in association with the variation of user programs. Generally, the various user programs are stored in an external memory
120
as transfer data and are downloaded to the internal RAM
111
by transferring data from the external memory
120
. However, a transfer program to be downloaded to the internal RAM
111
is also stored in the external memory
120
together with the transfer data to be transferred as a download program.
In the case of using the method, in the microcomputer
110
, the transfer data is written to the internal RAM
111
according to the download program in the external memory
120
and, therefore, a storing area in the internal RAM
111
is fixed. Accordingly, a vector table needs to be arranged at an area in the external memory
120
at which an access time is longer than that to the internal RAM
111
, so that performance of response to an interrupt is decreased when a CPU
112
executes the download program. Also, because an area of the internal RAM
111
is different from an area of the transfer data at which the program to be transferred to the internal RAM
111
is arranged, a wasteful space is caused in the internal RAM
111
. Further, if the internal RAM
111
in the microcomputer
110
is used as an instruction RAM, program data needs to be transferred to the instruction RAM. Furthermore, the method must be executed according to the user programs.
A microcomputer to solve the above-mentioned problems is disclosed in Japanese Unexamined Patent Publication No. 61-133437, namely JP-A 61-133437, in which, as shown in
FIG. 2
, a microcomputer
210
has a loader in an internal ROM
211
. By the loader, an external user program
220
is downloaded to an internal RAM
212
. The loader inputs a symbol to be inputted via an input/output port
213
to the internal RAM
212
.
In other words, in the case of using the above-mentioned conventional method of transferring the program as shown in
FIG. 1
, the transfer program to be downloaded to the internal RAM
111
is stored in the external memory
120
and the maximum number of waits is set just after reset is normally released. In JP-A 61-133437, the transfer data is downloaded by using a port function. Accordingly, the conventional methods of transferring the program are not preferable because a certain time to transfer data is necessary and fast data-transfer is impossible.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method of transferring a program by which fast and efficient transfer of data is possible and a microcomputer using the method.
According to one aspect of the present invention, there is provided a method of transferring a program of a microcomputer to an internal memory from an external memory which is connected to the microcomputer via a bus, including the steps of, in advance, providing in the microcomputer an internal ROM for storing program data which is recorded in the external memory as a transfer program serving as algorithm to be transferred to the internal memory, and directly transferring the program data which is recorded in the external memory to the internal memory from the external memory by using an address bus and a data bus in accordance with a transfer program of the internal ROM.
Thus, data is transferred between the microcomputer and the external memory by using the address bus and the data bus, so that a transfer program for downloading which transfers a user program is stored in the internal ROM and a CPU directly executes the transfer program in the microcomputer. Further, for downloading of the user program, the use of an input/output port is unnecessary and, therefore, the data can be transferred at a high speed.
Preferably, the program data to be transferred and set data including wait information thereof may be recorded in the external memory, and the microcomputer may receive at least the wait information before the program data which is recorded in the external memory is transferred to the internal memory.
Accordingly, the microcomputer sets the number of waits of the external memory and, then, uses the address bus and the data bus. Thereby, the data can be transferred efficiently.
Further, preferably, the microcomputer may start the transfer program which is stored in the internal ROM by transmitting the set data at a predetermined area including the wait information from the external memory via the address bus and the data bus when reset is released, may transfer the program data from the predetermined area to an internal RAM which is readable and writable via the address bus and the data bus on the transfer program in accordance with the wait information, may rearrange an area of the internal RAM of data obtained by converting a head address of the data that is transferred to the internal RAM into a head address of the predetermined area in the external memory and also by transferring the converted data to an area including a boot area and a vector table for interrupt, and may start the execution of the program by the transferred program data. The arrangement destination is a vector table area, thereby improving the performance of the response to interrupt.
According to another aspect of the present invention, there is provided a microcomputer for transferring program data from an external memory which is connected thereto via a bus to an internal memory, including an internal ROM for pre-storing a transfer program which transfers program data to be transferred to the internal memory from the external memory in which the program data to be transferred at a predetermined area and set data including wait information thereof are recorded, and an internal RAM including a boot area and a vector table, wherein on the transfer program, the program data to be transferred is transferred to the internal RAM and, thereafter, an area of the internal RAM is rearranged at the predetermined area of the external memory.
Preferably, the microcomputer further may include a dedicated register for controlling a switching operation of an address and a signal to execute the transfer program of the internal ROM, and the dedicated register rearranges the area of the internal RAM to an area including the boot area and the vector table by switching and changing a head address of the internal RAM to a head address of the predetermined area in the external memory when the transfer of the program data ends.
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patent: 4482951 (1984-11-01), Swaney et al.
patent: 4628448 (1986-12-01), Murao
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patent: 6125409 (2000-09-01), Le Roux
patent: 6195733 (2001-02-01), Nair et al.
patent: 6256781 (2001-07-01), Okajima
patent: 6546517 (2003-04-01), Yoshimura
patent: 61-133437 (1986-06-01), None
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Nakamura et al., “Effectiveness of Register Preloading on CP-PACS Node Processor”, IEEE 1998, pp 83-90.
Cao Chun
Gaffin Jeffrey
NEC Corporation
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