Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2000-05-30
2004-03-16
Beausoliel, Robert (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C711S213000, C712S227000
Reexamination Certificate
active
06708289
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a microcomputer, electronic equipment comprising the microcomputer and a debugging system.
BACKGROUND OF ART
In recent years, demand has increased with respect to a microcomputer which can be incorporated to various types of electronic equipment such as game machines, car-navigation systems, printers, portable information terminals and which can realize a high-level information processing. The thus-incorporated microcomputer is typically mounted on a user board known as a target system. A designer for such a target system debugs software for operating the target system by the use of a software development support tool called an in-circuit emulator (ICE), for example.
In such a debugging operation, a user finds any bug in the program by the use of ICE and then rewrites a program stored in a memory such as a flash memory (EEPROM) into the debugged program. Thus, the user must frequently rewrite the program stored in the flash memory until the program will have no bug.
The methods of rewriting a program in a flash memory includes following two methods.
In a first method, a flash memory is removed from a target system, and then a debugging program is written into the removed flash memory through a ROM writer. Thereafter, the flash memory is again mounted to the target system.
In a second method, as shown in
FIG. 15
, a terminal
406
for connection to a ROM writer
412
is provided in a target system
400
to which a microcomputer
404
is mounted. When the ROM writer
412
is connected to this terminal
406
and a flash memory is mounted to the target system
400
, a program stored in the flash memory
402
is rewritten.
However, the first method raised a problem in that time required to rewrite the program (turn-around time) is greatly increased, resulting in an extremely non-efficient debugging operation.
On the other hand, the second method raised a problem in that a program debugging system including a debugging tool
408
and a host system
410
cannot be integrated with a program rewriting system comprising the ROM writer
412
and a host system
414
. In other words, the second method must perform the program debugging operation on the host system
410
and the program rewriting operation on the other host system
414
. Thus, the program debugging and rewriting operations cannot be carried out on the same host system. This also reduces the efficiency in debugging.
DISCLOSURE OF THE INVENTION
It is therefore an objective of the present invention to provide a microcomputer, electronic equipment comprising the microcomputer, and a debugging system, all of which can improve the efficiency in the debugging operation.
To this end, the present invention provides a microcomputer having an on-chip debugging function, comprising:
a central processing unit for executing instructions; and
first monitor means for performing data transfer to and from a debugging tool provided outside of the microcomputer, performing debugging processing and also performing processing for execution of a jump command to an address at which a control program for a given memory is stored, based on the receive data from the debugging tool.
According to the present invention, the first monitor means receives data from the debugging tool and executes a jump command to an address of the memory control program based on the receive data. Thus, the processing of a monitor program for executing the first monitor means ends, and the processing of the memory control program which writes a program into the memory may start. The first monitor means further performs various processings for debugging of the program. According to the present invention, therefore, both of the program writing processing to the memory and debugging processing can be realized by using the first monitor means. As a result, the program debugging operation can be more efficiently carried out to reduce time required to develop a program.
The memory may be a non-volatile memory in which data can be electrically erased and written, and the memory control program may include an initializing program and a writing program for the non-volatile memory. This makes it possible to perform erasing and writing operations easily in the non-volatile memory.
The receive data may contain a routine address at which the memory control program is stored, a write data to be written into the memory and a data address at which the write data is written. This makes it possible to write the write data into the memory after the jump to the address of the memory control program.
Data to be sent from the first monitor means to the debugging tool may contain a flag for announcing an error in the writing of data into the memory. Thus, if an error occurs in the writing of data into the memory, the occurrence of error can be announced to the debugging tool.
The debugging tool may include second monitor means for converting a debugging command into at least one primitive command; and the first monitor means may determine a primitive command to be executed based on receive data from the second monitor means and perform processing for execution of the determined primitive command. It is thus not required that the monitor program for executing the first monitor means has any complicated routine for executing debugging commands. Consequently, the size of instruction code in the monitor program can highly be reduced so that the on-chip debugging function can be realized through a reduced scale of hardware.
The primitive command may include a jump command to an address at which the memory control program is stored, a command for starting execution of a user program, a command for writing data into an address on a memory map in debugging mode and a command for reading data from the address on the memory map. Since the primitive commands are simplified in such a manner, the size of instruction code in the monitor program can be further reduced.
The receive data from the second monitor means may contain data used to identify a primitive command to be executed by the first monitor means. This makes it possible to transfer an instruction of execution of the primitive command easily from the second monitor means to the first monitor means.
The present invention further provides electronic equipment comprising: a microcomputer as described above; an input source of data to be processed by the microcomputer; and an output device for outputting data processed by the microcomputer. Thus, the debugging operation for a program operating the electronic equipment or other programs can more efficiently be carried out to reduce time required to develop the electronic equipment and to lower the manufacturing cost.
The present invention further provides a debugging system for a target system including a microcomputer, comprising:
a debugging tool provided outside of the microcomputer; and
first monitor means for performing data transfer to and from the debugging tool, performing debugging processing and also performing processing for execution of a jump command to an address at which a control program for a given memory is stored, based on the receive data from the debugging tool.
According to the present invention, the first monitor means can perform both of any processing with respect to the memory (such as writing a program thereinto) and the debugging processing. Thus, the program debugging operation can more efficiently be carried out to reduce time required to develop a program.
REFERENCES:
patent: 4819234 (1989-04-01), Huber
patent: 5126541 (1992-06-01), Shinagawa
patent: 5659679 (1997-08-01), Alpert et al.
patent: 5951696 (1999-09-01), Naaseh et al.
patent: 5978937 (1999-11-01), Miyamori et al.
patent: 6249881 (2001-06-01), Porten et al.
patent: 6347368 (2002-02-01), Harthcock
patent: 6356961 (2002-03-01), Oprescu-Surcobe
patent: 60-72034 (1985-04-01), None
patent: 61-52747 (1986-03-01), None
patent: 1-286030 (1989-11-01), None
patent: 2-186448 (1990-07-01), None
patent: 3-78038 (1991-04-01), None
Beausoliel Robert
McCarthy Christopher S.
Oliff & Berridg,e PLC
LandOfFree
Microcomputer, electronic equipment and debugging system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Microcomputer, electronic equipment and debugging system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Microcomputer, electronic equipment and debugging system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3185794