Microcomputer capable of monitoring internal memory

Details Microcomputer capable of monitoring internal memory Microcomputer capable of monitoring internal memory

2005-01-18

2009-11-03

Puente, Emerson C (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S037000, C714S038110

Reexamination Certificate

active

07613956

ABSTRACT:
A microcomputer comprises: a CPU which sequentially executes a program; an internal memory connected to the above CPU via an internal bus; a debug support unit, which monitors the internal state in response to an externally provided command; a monitor memory, which stores data stored in the internal memory, for being accessed by the debug support unit; and a monitor memory control unit, connected to the internal bus, which at a concurrent copy mode performs a control to concurrently write, to the monitor memory, data which is written to the internal memory in response to access from the internal bus, and at a monitor mode performs a control to read data in the monitor memory in response to access from the debug support unit.

REFERENCES:
patent: 5621886 (1997-04-01), Alpert et al.
patent: 6345295 (2002-02-01), Beardsley et al.
patent: 6467083 (2002-10-01), Yamashita
patent: 2003/0056154 (2003-03-01), Edwards et al.
patent: 2001-101026 (2001-04-01), None

Affiliated with

Also associated with

Rating

Microcomputer capable of monitoring internal memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Microcomputer capable of monitoring internal memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Microcomputer capable of monitoring internal memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4071285