Microcomputer and evaluation device, evaluation method thereof

Details Microcomputer and evaluation device, evaluation method thereof Microcomputer and evaluation device, evaluation method thereof

2007-02-27

2007-02-27

Huynh, Kim (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output addressing

C708S100000

Reexamination Certificate

active

10741742

ABSTRACT:
Address data in an address counter is evaluated correctly. A microcomputer which outputs address data to an external device for evaluating the address data comprising an address counter specifying an address in a program memory, an address data output section which outputs, to the external device, discrimination data for discriminating whether or not the address data in the address counter is one which is branched in order for the external device to store only branched address data, the discrimination data being outputted together with the address data.

REFERENCES:
patent: 5870541 (1999-02-01), Tamura
patent: 6385754 (2002-05-01), Mizumoto et al.
patent: 6502210 (2002-12-01), Edwards
patent: 11-282713 (1999-10-01), None

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