Microcomputer and evaluation device, evaluation method thereof

Details Microcomputer and evaluation device, evaluation method thereof Microcomputer and evaluation device, evaluation method thereof

2007-03-13

2007-03-13

Huynh, Kim (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output addressing

C708S100000

Reexamination Certificate

active

10741743

ABSTRACT:
A microcomputer which outputs address data to an external device for evaluating the address data comprising an address counter specifying an address of a program memory, an address data output section for outputting the address data in the address counter to the external device by use of a clock having a higher frequency provided from the external device than a clock for operating the microcomputer while applying a unit based on a bit number smaller than a bit number of the address data in the address counter.

REFERENCES:
patent: 5870541 (1999-02-01), Tamura
patent: 6385754 (2002-05-01), Mizumoto et al.
patent: 6502210 (2002-12-01), Edwards
patent: 6760789 (2004-07-01), Fujita et al.
patent: 11-282713 (1999-10-01), None

Affiliated with

Also associated with

Rating

Microcomputer and evaluation device, evaluation method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Microcomputer and evaluation device, evaluation method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Microcomputer and evaluation device, evaluation method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3763066