Microcode program sequencer

Details Microcode program sequencer Microcode program sequencer

1975-09-12

1977-05-31

Shaw, Gareth D.

Communications: electrical

Digital comparator systems

G06F 916

Patent

active

040272931

ABSTRACT:
A microcode program sequencer includes first and second registers (herein designated the Q and P registers), each connected to a computer memory to receive addresses therefrom. Control means is provided for each register such that the P register will provide output addresses to a microcode memory, whereas the Q register(s) provide output addresses to the P register. By properly operating the control means, incrementing of addresses from the P register can be accomplished, as well as address jumps and returns, using the Q register. Further, the contents of the Q register may also be incremented in synchronism with the P register, as desired. One feature of the invention resides in a conditional latch circuit which may be selectively operated as a latch or as an OR gate.

REFERENCES:
patent: 3839705 (1974-10-01), Davis et al.
patent: 3868649 (1975-02-01), Sato et al.
patent: 3886523 (1975-05-01), Ferguson et al.
patent: 3909800 (1975-09-01), Recks et al.
patent: 3979729 (1976-09-01), Eaton et al.

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