Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive
Reexamination Certificate
2001-07-05
2003-12-30
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Physical stress responsive
C438S458000, C438S739000
Reexamination Certificate
active
06670212
ABSTRACT:
This invention relates to improvements in micro-machining, perhaps in a particular example to improvements in manufacturing motion sensors.
It is known to produce micro-mechanical sensors using micro-machining techniques. In particular, GB 2 276 976 shows a particular method for the production of such a sensor wherein a silicon wafer has cavities formed into its surface. Next a second wafer is bonded to the surface of the first wafer and the second wafer etched in a manner to release portions of the second wafer which are above the cavities in the first wafer. Thus, suspended resonating portions are formed which exist above the cavities in the first wafer.
Further, WO 95/08775 shows a structure wherein a layer of silicon is formed onto a substrate. The silicon is etched in a manner to form suspended resonator portions above cavities in the silicon.
One such micro-mechanical sensor is the vibratory gyroscope which measures the rate of turn and has applications in the fields of vehicle control, smart munitions, robotics, virtual reality, leisure and medicine as well as other fields.
According to a first aspect of the invention there is provided a method of fabricating a micro-mechanical sensor comprising taking a first wafer with an insulating layer formed thereon and with a second insulating layer bonded to the insulating layer and
a) patterning and subsequently etching one of either the first or second wafers such that channels are created in said one wafer (the etched wafer) terminating adjacent to the insulating layer; and
b) etching the insulating layer to remove portions of the insulating layer adjacent the etched wafer such that those portions of the etched wafer below a predetermined size, suspended portions, become substantially freely suspended above the other wafer.
Preferably the method is used to fabricate micro mechanical sensors or micro mechanical actuators.
Such a method leaves portions of the etched wafer which are above the predetermined size attached to said other wafer through the insulating layer. Thus, the micro-mechanical sensor so formed comprises both suspended portions and also portions anchored to the other wafer by the insulating layer.
During an etch, etchants will generally etch any free surfaces of a target material which they contact. Therefore, if a volume of target material is exposed to an etchant it will be etched from each of the sides which the etchant contacts. The length of time it takes the etchant to completely remove the target material will depend upon the shortest distance from an edge portion of the volume to the centre of the volume. Thus a long thin shape will be remove before a square shape of equal volume. Thus, the predetermined size above which suspended portions become separated from the other wafer depends upon the dimensions of the volume of the insulating layer being etched.
Step b) of the process may be performed in a single pattern and etch step or may be as a series of pattern and etch steps.
The insulating layer may be thought of as a sacrificial layer and as an anchoring layer. However, the skilled person will appreciate that the insulating layer has insulating properties which may be utilised.
The method according to the first aspect of the invention is simpler to use that prior art methods. The resulting reduction in process complexity is an advantage over both sacrificial surface micro-machining (SSM) and traditional bulk micro-machining (TBM) technologies.
Further advantages of the method are that structures formed in the etched wafer can be made with a greater depth than in prior art methods using surface micromaching (SSM) wherein layers are deposited or other types of Silicon On Insulator processing. Typical depth limits for a deposited layer are between 10 &mgr;m-20 &mgr;m. It would not have been possible to reliably deposit material to the depth achieved by the present method. For instance providing material by deposition has the problem that the uniformity of the material is hard to control with errors of 5% across a wafer being typical. Further, the process provides a buried insulating layer.
Further, as the thickness of a deposited layer increases the internal stresses within the layer of deposited material increase and can eventually lead to the deposited layer delaminating itself from the material upon which the material was deposited. The present method may be used to fabricate structures having a depth of up to substantially 2 mm. Possibly this may be increased to 2.5 mm, 3 mm, 3.5 mm or 4 mm.
The skilled person will appreciate that it is beneficial to have deeper structures since they will be stiffer and will therefore have better mechanical properties. Further it is advantageous to have the structures fabricated from single crystal material rather than from deposited material since this also leads to many beneficial properties within the formed structures.
The skilled person will realise that wafers can be purchased which comply with the starting steps of the method; that is a sandwich structure of two wafers with an insulating layer provided between them. Therefore, the starting point in the process may be the commercially available sandwich structure. The method may however, include the steps of fabricating an insulating layer onto a first wafer and subsequently bonding the second wafer to the insulating layer.
Further it will also be appreciated that the cost of a wafer with silicon and insulating layers provided on the surface is higher than the cost of a wafer without the extra layers provided. The combined advantages of the invention may more than offset the higher cost of the wafer with the extra layers compared to a standard wafer.
The skilled person will appreciate that the gap between the suspended portions defined from said one layer and said other wafer is defined by the thickness of the insulating layer and therefore by controlling the thickness of the insulating layer between the first and second wafers this gap may be controlled. The thickness of the insulating layer may be substantially in the range 10 nm to 20 &mgr;m. More preferably the insulating layer has a thickness substantially in the range 100 nm to 10 &mgr;m. In the most preferred embodiments the thickness lies substantially in the range 1 &mgr;m to 5 &mgr;m. In particular, layer thickness of substantially 1.5 &mgr;m and 3 &mgr;m may be suitable.
Preferably the first wafer is a mechanical wafer which undergoes subsequent processing to have the structure formed therein. An advantage of forming the insulating layer on the mechanical wafer is that a cleaner interface is formed for subsequent processing (for example etching).
A further advantage of providing the first wafer as the mechanical wafer is that the devices subsequently formed from the mechanical wafer are formed from the single crystal structure of the wafer. As previously discussed this has advantages, namely it is likely that devices formed will have a higher reliability and that resonant devices formed will have a higher quality factor when compared to structures formed in polycrystalline materials of prior art methods. However, the single crystal of the wafer often shows anisotropic properties and considerations may arise which need to be considered in the design stage to account for the anisotropic nature. The anisotropic properties may depend on factors including crystal orientation of the material and the accuracy of any cut of the crystal.
Preferably the second wafer is a substrate or handle wafer which is provided as a support for the micro-mechanical sensor.
Of course, the first wafer may be a substrate or handle wafer and the second wafer may be a mechanical wafer which undergoes subsequent processing (for example etching). Such a structure is equally possible but the interface between the mechanical wafer and the insulating layer tends to be of poorer quality since this is where bonding occurs.
One company capable of providing a sandwich structure capable of being used for the start of the method is BCO Technologies (NI) Ltd., Belfast, BT11 8BU.
The method
McNie Mark E.
Nayar Vishal
Niebling John F.
Nixon & Vanderhye P.C.
Qinetiq Limited
Simkovic Viktor
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