Micro-controller unit for selectively accessing an internal memo

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395550, 395700, 364DIG1, 36518903, G06F 1300, G06F 1200, G06F 104

Patent

active

053718690

ABSTRACT:
A micro-controller unit (MCU) selectively accesses one of an external extended memory and an internal memory in response to a signal on a read/write terminal instead of an additional terminal. The micro-controller unit includes an external memory control block, an external timing control block, and the internal memory, and additionally includes a reset detection circuit, a memory access clock generation circuit and a latch. The reset detection circuit receives an external reset signal for initializing the MCU and an external clock, and detects whether the micro-controller unit is reset. The memory access clock generation circuit receives an output signal from the reset detection circuit and generates a memory access clock signal to selectively access one of the internal memory and the external extended memory. The latch receives the external reset signal, the memory access clock signal and a memory interface signal applied to the read/write terminal for applying a memory access selection signal to the external memory control block, the external timing control block and the internal memory, whereby a memory selection is performed by the reset signal and the memory interface signal.

REFERENCES:
patent: 4432049 (1984-02-01), Shaw et al.
patent: 4542453 (1985-09-01), Patrick et al.
patent: 4677586 (1987-06-01), Magar et al.
patent: 4870562 (1989-09-01), Kimoto et al.
patent: 4870563 (1989-09-01), Oguchi
patent: 5046180 (1991-09-01), Ueda et al.

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