Micro-code sequencer with branch-taken and branch-not-taken micr

Electrical computers and digital processing systems: processing – Processing control – Processing sequence control

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712234, G06F 922

Patent

active

059419865

ABSTRACT:
The dual-ported micro-code sequencer includes a micro-code ROM which provides micro-code vectors to a latch for access by a data path logic unit. The latch allows for pipe-lining whereby one micro-code vector may be fetched while a second micro-code vector is being executed by the data path logic unit. Micro-code vectors provided by the ROM may include branched vectors controlled by branch conditions. Two output ports are provide to the micro-code ROM for simultaneously outputting both branch-taken vectors and branch-not-taken vectors to a multiplexer connected to the input of the latch. The multiplexer and the two output ports are provided such that both the branch-taken and the branch-not-taken vectors are available to the latch input. Thus, once the branch condition is evaluated the correct branched vector is latched for access by the data path logic. The dual-ported architecture substantially eliminates a problem in pipelined micro-code sequencers wherein a clock cycle is wasted if a branch is taken. The micro-code ROM is written such that the branch-taken and branch-not-taken vectors share a common micro-code address.

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