Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond
Reexamination Certificate
2007-11-20
2007-11-20
Clark, S. V. (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Wire contact, lead, or bond
C257S787000
Reexamination Certificate
active
11307314
ABSTRACT:
A micro chip-scale-package system including providing a metal pattern on an adhesion material, attaching an integrated circuit die to the metal pattern, and molding an encapsulant over the integrated circuit die and the metal pattern.
REFERENCES:
patent: 5273938 (1993-12-01), Lin et al.
patent: 5683942 (1997-11-01), Kata et al.
patent: 6545367 (2003-04-01), Sota
patent: 6566168 (2003-05-01), Gang
patent: 6586834 (2003-07-01), Sze et al.
patent: 6611063 (2003-08-01), Ichinose et al.
patent: 6710437 (2004-03-01), Takahashi et al.
patent: 6746897 (2004-06-01), Fukutomi et al.
patent: 6822323 (2004-11-01), Kim et al.
patent: 7074650 (2006-07-01), Honda
patent: 7102225 (2006-09-01), Khan et al.
patent: 7154166 (2006-12-01), Ano
patent: 7187072 (2007-03-01), Fukutomi et al.
Kim Jong Kook
Lee Hun Teak
Lee Jason
Clark S. V.
Ishimaru Mikio
Stats Chippac Ltd.
LandOfFree
Micro chip-scale-package system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Micro chip-scale-package system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Micro chip-scale-package system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3817191