Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Reexamination Certificate
1999-12-13
2001-01-30
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
C438S029000
Reexamination Certificate
active
06180430
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to LCD semiconductor devices, and more specifically to reflective type LCD-on-silicon semiconductor devices.
BACKGROUND OF THE INVENTION
LCD-on-silicon devices, or reflective type display LCD devices, need to be illuminated with high intensity light. Stray light leaking through the gaps between metal lines/pixels may cause the bottom, or control, transistors to malfunction by the photoelectric effect. This phenomenon limits the brightness of the projected image to lessen the risk/effects of the photoelectric effect on the bottom transistors.
U.S. Pat. No. 5,767,827 to Kobayashi et al. describes a passivation film CMP polishing method used in the fabrication of reflective type active matrix LCD display panels.
U.S. Pat. No. 4,203,792 to Thompson describes a method of fabricating a dome shaped transparent polymer material within which is an opto-isolator, or optically coupled isolator. The method provides for an initial gelling of the multicomponent polymer material so that the desired dome shape may be retained while a heat cure is performed. An opaque body of polymer, adapted for diffusely reflecting light, can be used to enclose the dome shaped transparent polymer material.
U.S. Pat. No. 5,926,702 to Kwon et al. describes a method of fabricating a TFT (thin film transistor) array substrate having a black matrix (light shielding layer) to generally shield the TFT, data bus line and gate bus line of the lower substrate of an LCD (liquid crystal display) to prevent light leakage. A transparent planarization layer is used to reduce the step height near the boundaries of the black matrix resin and the pixel electrode (overlying the transparent planarization layer). This reduces the poor rubbing problem otherwise present near the boundaries between the black matrix and the pixel electrode.
U.S. Pat. No. 5,854,663 to Oh et al. describes a liquid crystal display (LCD) and a method of making same where a black matrix region is formed over a orientation layer that is evenly formed on the surface of the TFT panel. The orientation layer is formed and rubbed to form regular microgrooves on its surface which serve to align liquid crystal molecules for selectively transmitting light. The black matrix is then formed over the rubbed orientation layer so that the orientation of the liquid crystal molecules within 1 to 2 &mgr;m around the black matrix region is substantially carried out thus increasing the contrast ratio and enhancing picture quality.
U.S. Pat. No. 5,851,411 to An et al. describes a method of manufacturing an LCD display that includes first and second substrates each having an inner light shielding region and an edge light shielding region. The inner light shielding and an edge light shielding regions are both formed of a black matrix.
U.S. Pat. No. 5,850,271 to Kim et al. describes a color filter substrate for an LCD device that is obtained by patterning color filters on a transparent substrate, selective-coating an overcoat layer on the substrate, and forming a common electrode and a black matrix to be connected to each other without any further steps. The black matrix is comprised of an opaque metal such as aluminum (Al) or chromium (Cr).
U.S. Pat. Nos. 5,781,254 and 5,784,133, both to Kim et al., describe an LCD, and a method of making same, respectively, having a top plate and a bottom plate. The bottom plate includes a plurality of gate bus lines and drain bus lines arranged in a matrix on a substrate surface with a plurality of TFTs formed at the intersections of the gate and drain bus lines. A black matrix pattern, including a non-conductive black resin, is provided on the gate and drain bus lines and the TFTs for shielding them from light generated by back lighting the display. A protective layer is formed on the black matrix pattern having contact holes for coupling the pixel electrodes to corresponding drain electrodes of the TFTs.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide reflective type LCD-on-silicon device and a method of fabricating the same that permits increased light intensity to fall on the device.
Another object of the present invention to provide reflective type LCD-on-silicon device and a method of fabricating the same that allows for a brighter image.
A further object of the present invention to provide reflective type LCD-on-silicon device and a method of fabricating the same that allows for a increased maximum size of the projected image.
Yet another object of the present invention to provide reflective type LCD-on-silicon device and a method of fabricating the same that includes a light and signal shielding layer that protects the bottom, or control, transistors from stray light.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a semiconductor structure having a control transistor formed therein is provided. The control transistor having a source and a drain. An interlevel dielectric (ILD) layer is deposited and patterned over the semiconductor structure to form S/D contact openings exposing the source and drain of the control transistor. S/D metal plugs are formed within the S/D contact openings. The S/D metal plugs being comprised of a first metal. M1 metal lines are formed over the ILD layer and are connected to at least the S/D metal plugs. The M1 metal lines being comprised of the first metal. A M1 intermetal dielectric (IMD) layer is deposited and patterned over the M1 metal lines to form M1 contact openings exposing at least some of the M1 metal lines. A first M2 metallization layer is deposited, etched and planarized over the M1 IMD layer, filling the M1 contact openings, and forming M1 metal plugs within the M1 contact openings and M2 metal islands connected to, and integral with, at least the M1 metal plugs. The M2 metal islands have exposed side walls. Sidewall spacers are formed on the exposed M2 metal island side walls. A second M2 metallization layer is deposited and planarized over said the M2 metallization layer to form M2 metal lines adjacent to and contiguous with the sidewall spacers of the M2 metal islands. The M2 metal islands, M2 metal island sidewall spacers, and M2 metal lines form a light shielding layer. The M1 metal plugs, M2 metal islands, and M2 metal lines are comprised of a second metal. At least one additional IMD layer is deposited and patterned over the light shielding layer to form light shielding layer contact openings exposing at least some of the light shielding layer metal islands or lines. Light shielding layer metal plugs are formed in the light shielding layer contact openings. Pixels electrodes are formed over the at least one additional IMD layer and are connected to the light shielding layer metal plugs. An optical interface layer is formed over the pixel electrodes. The M1 IMD layer and at least one additional IMD layer may comprise black dielectric.
REFERENCES:
patent: 4203792 (1980-05-01), Thompson
patent: 5767827 (1998-06-01), Kobayashi et al.
patent: 5781254 (1998-07-01), Kim et al.
patent: 5784133 (1998-07-01), Kim et al.
patent: 5850271 (1998-12-01), Kim et al.
patent: 5851411 (1998-12-01), An et al.
patent: 5854663 (1998-12-01), Oh et al.
patent: 5926702 (1999-07-01), Kwon et al.
Feng Dai
Kong Sik On
Lin Yung-Tao
Tsai Robert Chin Fu
Bowers Charles
Chartered Semiconductor Manufacturing Ltd.
Pike Rosemary L.S.
Saile George O.
Stanton Stephen G.
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