Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2004-11-16
2008-03-11
Sparks, Donald A (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S141000
Reexamination Certificate
active
07343454
ABSTRACT:
We present a triangle ordering mechanism that maintains triangle ordering of coherence messages in SMP systems. If cache A sends a multicast message to caches B and C, and if cache B sends a message to cache C after receiving and processing the multicast message from cache A, the triangle ordering mechanism ensures that cache C processes the multicast message from cache A before processing the message from cache B. The triangle ordering mechanism enables efficient snoopy cache coherence in SMP systems in which caches communicate with each other via message-passing networks. A modified version of the triangle ordering mechanism categorizes coherence messages into non-overlapping sequencing classes, and ensures triangle ordering for coherence messages in the same sequencing class. The modified triangle ordering mechanism can significantly reduce potential performance degradation due to false waiting.
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F. Chau & Associates LLC
International Business Machines - Corporation
Ruiz Aracelis
Sparks Donald A
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