Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...
Reexamination Certificate
1999-09-30
2001-10-16
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
C438S513000
Reexamination Certificate
active
06303518
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention:
The present invention is related to a method of forming a dielectric of the type used in semiconductor damascene applications, and more particularly to an improved process for forming a low-dielectric-constant interface layer having improved characteristics.
2. Description of the Background:
Manufacturers of integrated circuits (ICs) continue to make ever-smaller devices, which allow for greater speed, but require increased device packing densities. T he resulting increase in packing densities on a semiconductor chip, and the associated increase in functionality and complexity, require features which are smaller, more complex, and more closely-spaced.
As IC feature sizes are made smaller, for example to 0.25 microns and below, problems, such as misaligned or “unlanded” vias, increased resistance, and resistance-capacitance (RC) coupling, seem unavoidable. For example, as features become small and more closely-spaced, RC delays become an increasing part of total signal delays, offsetting any speed advantage derived from the smaller device size. RC delays thus limit improvement in device performance. One way to improve device performance and reliability would be to lower the resistivity using highly conductive metals, such as copper. Of importance to the present invention is the improvement of device performance and reliability by way of reducing capacitance, for example, by employing lower dielectric constant (low-k) materials.
Since capacitance is directly proportional to the dielectric constant (k), RC problems in ICs, can be reduced if a low-dielectric-constant material is used as the insulating material. The need for lower dielectric constant materials for use as intermetal and interlevel dielectrics for modern semiconductor technology is well known in the semiconductor industry. For example, silicon dioxide (SiO
2
), has long been used as a dielectric for integrated circuits because of its excellent thermal stability and relatively good dielectric properties (k~4.0). However, the need exists for a dielectric material which is suitable for use in ICs which has a lower dielectric constant than SiO
2
. After extensive study, a very promising dielectric material has been identified, known as Fluorosilicate Glass (FSG), which has a dielectric constant (k) of less than 3.7.
Many processes are known for depositing FSG thin film layers for damascene applications. One of the most important advantages of FSG is the simplicity with which it may be deposited, especially with CVD processes. As shown in
FIG. 1
, the process
10
begins with the in-situ deposition
12
of the reactants in a reaction deposition chamber. After an optional, yet, conventional SiN deposition
14
, the reactant gas, containing reactants, such as N
2
O, SiF
4
and SiH
4
, are introduced into the chamber through an inlet port and arc excited to create ions or radicals by a high electric field created by an RF voltage. The electric field causes the inlet gas to become excited enough to form a glow discharge or plasma. When a plasma is used to generate the ions or radicals that recombine to give the desired film, the process is plasma-enhanced (PECVD). Plasma enhanced deposition
16
occurs when the molecules of the incoming gases are broken up in the plasma and the appropriate ions are recombined on the substrate surfaces to give the desired FSG film.
Next, an optional hardmask deposition
18
is applied to the structure, which is subsequently etched
20
, or similarly cut, to create the desired pattern required for semiconductor applications. At this stage in the conventional process, a layered structure
30
, similar to that shown in
FIGS. 2A
or
2
B, has been developed. Next, the structure is degassed
22
and a metal barrier layer is deposited
22
followed by metal deposition
24
, planarization
26
, and final clean
28
. Unfortunately, the structure formed using the conventional technique
10
, is subject to many drawbacks. Generally, the degassing
22
typically fails to remove free fluorine ions which are a by-product in the film of the PECVD process. The film in this stage is considered chemically unstable. Moreover, FSG film tends to absorb H
2
O. The presence of free fluorine ions and hydrogen may lead to the eventual formation of HF gas, which tends to degrade adhesion properties of the FSG. For example, after the application of the metal barrier layer, any HF gas that may form may not be able to diffuse out, which usually leads to blistering and bubbling of the metal and etch stop layers. Moreover, most methods used for FSG film deposition are not practical to use because of their unstable or higher cost of ownership (CoO).
For these reasons, what is needed is an improved process for depositing a robust FSG film on a substrate, metal barrier, or etch stop layer, such that the FSG film exhibits, for example, improved chemical stability, deposition rate, uniformity of thickness, and adhesion characteristics.
SUMMARY OF THE INVENTION
The present invention is an improved method of depositing a dielectric of the type used in damascene applications, where in-laid conductors are formed in the dielectric layer. More particularly, the present invention is an improved CVD process, preferably a PECVD process, for forming a low-dielectric-constant insulating material on a semiconductor substrate, or on and/or under a metal barrier or etch stop layer of SiNx, Ta(N), TiN, WNx and others. Specifically, the improved PECVD process provides for deposition of an N
2
O+SiF
4
+SiH
4
based FSG film having improved characteristics, which may be accomplished in any conventional PECVD chamber, but preferably in a dual frequency PECVD chamber. The dual frequency chamber may have both high and low frequency RF power, used to ignite and sustain the plasma.
The improved PECVD process of the present invention includes the addition of N
2
to the chemical reactants N
2
O+SiF
4
+SiH
4
, in forming the FSG to be deposited on the surface of the substrate. As described in more detail below, by adding N
2
to the reaction in the PECVD, the reaction is more controllable. Control of the reactions leads to improved adhesion between the FSG film and other layers, such as etch and metal barrier layers of SiNx, Ta(N), TiN, WNx, and others. The improved controllability also improves the film thickness uniformity and the deposition rate of the deposited layer. It has also been advantageously determined that the addition of nitrogen atoms in the reaction increases the number of Si-N bonds formed within the FSG film, which makes the FSG film less susceptible to water absorption.
During the deposition process free radicals and ions of hydrogen (H), oxygen (O), and flourine (F) are formed into the film network, which may form weak and dangling bonds with Si or Si—O. Advantageously, another improvement to the process occurs after completion of the deposition process. The FSG thin film layer may be exposed to, and allowed to react with, H
2
O. The length of the exposure may vary, and may range from minutes, to hours, to days. The FSG may then be annealed in a non-oxidizing atmosphere, such as in nitrogen, argon, or the like. The anneal provides important improvements to the process of the present invention. For example, the anneal provides the energy necessary for the H
2
O to attack the weak and dangling bonds, formed by the free ions during the deposition and H
2
O exposure. The anneal, described in more detail below, may be described as two heat treatments to the FSG film. The first heat treatment primarily breaks the weak bonds and diffuses out free F, H, O, and H
2
O and hydrogen near the surface of the FSG film. As mentioned above, it may not be desirable to have free F within the film, however; it is also not desirable for F within the film to be depleted. Thus, the second heat treatment primarily provides a bonding energy interior of the FSG film to bond remaining free F and Si, so that F levels are maintained within the FSG film. As one may appreciate, the firs
Karim M. Ziaul
Tian Jason L.
van Schravendijk Bart J.
Lopez Theodore P.
Nelms David
Novellus Systems Inc.
Skjerven Morrill & MacPherson LLP
Vu David
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