Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2002-03-12
2004-11-16
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C703S002000, C703S014000
Reexamination Certificate
active
06820245
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to the field of electromagnetic modeling of integrated circuits and systems, and, more particularly, to methods, systems, and computer program products for modeling inductive effects in integrated circuits and systems.
In modern digital integrated circuits, logic path delays may be dominated by the influence of parasitic capacitive and inductive coupling among the metal interconnect wiring. As technologies may continue to demand increased performance from integrated circuit devices and systems, more detailed interconnect models may be needed to predict signal delay with greater accuracy. Due to the complexity of many integrated circuit devices and systems, such modeling may be computationally expensive. Increasing system size, however, may result in greater emphasis being placed on efficient analyses of parasitic effects and performance. Full three-dimensional interconnect models often have unmanageable sizes and/or densities associated therewith such that they may not be useful for analysis and simulation purposes without additional approximations and simplifications.
One class of electromagnetic properties that may be modeled is on-chip inductive effects and their interactions with on-chip capacitance. While operating frequencies may make on-chip inductive effects evident, localizing the magnetic couplings for efficient extraction and analysis may be difficult. Localized extraction techniques have been used for reducing the size of the interconnect models. It has been demonstrated, however, that simple truncation (i.e., discarding long range couplings) can reduce or destroy the stability of an electromagnetic model. Shell models have been applied for stable localized extraction, but finding the correct shell sizes for a particular target accuracy may not be straightforward. See, for example, Beattie el al., IC Analyses Including Extracted Inductance Models, 36
th
Design Automation Conference (DAC), June 1999, the disclosure of which is hereby incorporated herein by reference.
SUMMARY OF THE INVENTION
According to some embodiments of the present invention, inductive effects in an integrated circuit device and/or system are modeled by partitioning the integrated circuit device and/or system into multiple windows or portions and determining a first localized inductance matrix for a first portion of the circuit and/or system and a second localized inductance matrix for a second portion of the circuit and/or system. The first and second localized inductance matrices are solved to obtain first and second localized susceptance vectors. The first and second localized susceptance vectors may be combined to form a susceptance matrix, which may be used directly in a susceptance-based simulator, or inverted to obtain a sparser inductance matrix that is representative of the inductive couplings in the entire integrated circuit device and/or system. This inductance matrix may be sparsified by canceling one or more inductive coupling elements. Those inductive coupling elements that are canceled during sparsification may be added to the respective diagonal inductive coupling elements in the inductance matrix that correspond to the respective conductors for which the canceled inductive coupling elements were determined.
In other embodiments of the present invention, the window may be associated with an active conductor and the window size may be chosen by defining a susceptive coupling threshold and then increasing the size of the window until susceptive coupling elements for additional conductors to be contained in the window are less than the threshold. In particular embodiments, the susceptive coupling threshold may approximately 1% of the self-term susceptive coupling element magnitude.
In still other embodiments of the present invention, the localized inductance matrices may be solved to obtain localized susceptance vectors by determining, for the active conductor in each window or portion, the currents flowing through other conductors in the window such that the active conductor has a total magnetic flux of unity and the other conductors in the window have respective total magnetic fluxes of zero.
To allow the inductance matrix for the entire integrated circuit device and/or system to be positive definite, the susceptance matrix is made symmetrical. To allow symmetry of the susceptance matrix, in accordance with embodiments of the present invention, the susceptive coupling element determined for a pair of conductors with respect to a first window is compared with the susceptive coupling element determined for the pair of windows with respect to a second window. The element with the smaller absolute value of the two susceptive coupling elements is selected and the non-selected coupling element is replaced with the selected coupling element in the susceptance matrix. The foregoing operations are repeated for all active conductor pairs.
In still other embodiments of the present invention, the susceptance matrix may be sparsified by canceling one or more susceptive coupling elements. Those susceptive coupling elements that are canceled during sparsification may be added to the respective diagonal susceptive coupling elements in the susceptance matrix that correspond to the conductors between which the canceled susceptive coupling elements were determined.
Although the present invention has been described above primarily with respect to method aspects of the invention, it will be understood that the present invention may be embodied as methods, systems, and/or computer program products.
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Beattie Michael W.
Pileggi Lawrence T.
Carnegie Mellon University
Myers Bigel & Sibley & Sajovec
Siek Vuthe
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